| commit | bc3fd0ab567ae6c1eab1aa12c21e8d5d80c4dd69 | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Wed Mar 06 14:28:30 2024 -0800 |
| committer | Alex Van Damme <atv@google.com> | Fri Mar 08 13:26:47 2024 -0800 |
| tree | 65857b1c508ea20a9832a79838d7173c5eb1214f | |
| parent | f886ceb27a83758b9ba0033339f14ee346856812 [diff] |
Fixup ecall/mret and associated CSRs - Adjust ecall to be callable from any mode, and to jump to `mtvec`, with the LSB cleared. - Have ecall set the `mepc` register to the calling instruction address. - Align `mcause` with the spec. Change-Id: Ia520451306362a895c8c6317a034fd6d58718cfd
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog