| commit | b8ffcb477cc2a31b8d7a909fb382c60a1a89c993 | [log] [tgz] |
|---|---|---|
| author | Derek Chow <derekjchow@google.com> | Tue Jul 16 13:43:27 2024 -0700 |
| committer | Derek Chow <derekjchow@google.com> | Tue Jul 16 13:44:39 2024 -0700 |
| tree | 5efd46cf8b2b60fc5bf4c46e7e5c89ec3bafba05 | |
| parent | 810f520d185c323ced98fced687984965f648f8d [diff] |
Add InstructionBuffer. Change-Id: I9b873118fdaf343c3cb16b0cb06f9132984b2660
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog