| commit | b873bcc4b399d73f657016cfac4022a9209159c0 | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Tue Oct 29 15:32:46 2024 -0700 |
| committer | Alex Van Damme <atv@google.com> | Tue Oct 29 15:34:51 2024 -0700 |
| tree | 8fc2e6e58bf2773fa614192f2322a768597b0109 | |
| parent | 61749a810c1c721e350756e4dc81aeec6dfc02e5 [diff] |
Plumb enable signal in TCM128 - Bring the enable signal all the way to the SRAM instances, so that enable must be high in addition to the SRAM being selected, for it to be enabled. - Delete an unused TCM class. Change-Id: I0b4cc2f76b9ad25222257c6d1ee7e11a806874d4
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog