| commit | aa4c418980f76c481d2aef5ba0f3d61b0f8ea16f | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Mon Oct 07 14:28:19 2024 -0700 |
| committer | Alex Van Damme <atv@google.com> | Mon Oct 14 11:24:12 2024 -0700 |
| tree | 6454c7cb6f2a76536e5d008ba82b293c6eada1d8 | |
| parent | 593a132bb0f5ca560e07da8bc6c5e39a86413d03 [diff] |
Make WFI actually stall the core until an interrupt - Add top-level signals, `wfi` and `irq` -- `wfi` is an output signaling that the core is waiting for an interrupt to proceed, and `irq` is an input for said interrupt. Now when the WFI instruction is decoded, the pipeline will be halted and the `wfi` signal raised. - In CoreAxi, the top level interrupt signal is `irqn`, and is inverted before being passed to Core. Change-Id: I49bb6e2e4ed07e0579d36f37f86ede7b33377852
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog