commit | a1237c941b5699bfb3055206213bd3f11c27f3a4 | [log] [tgz] |
---|---|---|
author | Alex Van Damme <atv@google.com> | Tue Dec 05 13:24:53 2023 -0800 |
committer | Alex Van Damme <atv@google.com> | Thu Dec 07 17:34:33 2023 -0800 |
tree | a4729f4155664cc7c35973a5d9c09da168b04ea9 | |
parent | df9480e9457b450bf701b3763b826b98fdeb1bf5 [diff] |
Add CSRs touched by riscv-tests, and a new `kisa` CSR - riscv-tests uses a few CSRs that we did not explicitly implement (version/architecture CSRs) -- define them in the HDL so we can potentially give them meaningful values in the near future. - Add a custom CSR `kisa`, which is intended to help software detect what version of Kelvin they're running on, and what features it supports. Initially, the value of the CSR is 0, which indicates that Kelvin only supports the features of the initial open-source release. Change-Id: Ide3362805e72d8970f02c351c491ec0d5fbb67ad
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog