| commit | a1149e19fece342db7d8a28db19a277bc865c7e9 | [log] [tgz] |
|---|---|---|
| author | David Gao <davidgao@google.com> | Tue Sep 09 19:52:05 2025 +0000 |
| committer | David Gao <davidgao@google.com> | Thu Sep 11 16:29:22 2025 -0700 |
| tree | a23c56ad92d8caef06e9e5c1407c948ba9a63544 | |
| parent | 6506d565bcefb75cf3a8e42b6c15c02c8d7e5702 [diff] |
Confirm no more rvv instructions write rd Tests are added for vcpop. Change-Id: I0178482dd8a8c7623ae14a234dddcc5bbcdee0aa
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog