| commit | c27390cfa588e41bb121932dbf8fc6bc7fd6d806 | [log] [tgz] |
|---|---|---|
| author | Derek Chow <derekjchow@google.com> | Mon Feb 26 22:56:07 2024 -0800 |
| committer | Derek Chow <derekjchow@google.com> | Thu Feb 29 16:20:08 2024 -0800 |
| tree | 1a0e5fbc9216d3957247575d55f9318d6ac708b8 | |
| parent | bd17df6889057b8ccdbc09561ce5bcd0a15a29d9 [diff] |
Add option to disable VCore. Change-Id: Ie139a62fb0ac755dc5fbbec61b8b7aa68c17425e
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog