| commit | 9aebc9044e31738389683697128016e31044fb90 | [log] [tgz] |
|---|---|---|
| author | Pu Wang <pu.wang@verisilicon.com> | Mon Dec 30 16:36:41 2024 +0800 |
| committer | Derek Chow <derekjchow@google.com> | Wed Jan 15 10:06:48 2025 -0800 |
| tree | f1e37d95f410a9f851e1ca0d1de25be30b195f03 | |
| parent | 880e0ff60d0103eeddfc02c28281be0d6f8b8454 [diff] |
update illegal inst check in behavior model. Change-Id: I53dee2d270f0e7becf0f46549f45c05c880d4b78
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog