Fix failing SystemC tests The SystemC op encoder/decoder is out of sync with the chisel code, in which the unimplemented ops are removed from the encoder/decoder. Convert these testbenches from cc_binary to cc_test Change-Id: Ie07b2a8fb842d7a4825913918c0b4435346869f6
Kelvin is a RISC-V32IM core with a custom instruction set.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog