commit | 95ee0df73af23ea4dc071977d892c67be077d7ed | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Wed Jul 16 15:21:13 2025 -0700 |
committer | Derek Chow <derekjchow@google.com> | Wed Jul 16 16:17:55 2025 -0700 |
tree | 6374292fcba386c5f4200a69d2976781ac562e53 | |
parent | 1250c6738c2332050d9fea27072b90c6bbfd3056 [diff] |
Update assertions in RvvFrontEnd. Change-Id: Ib845de88bc7dadd0336c38c865055e7c5a35f325
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog