| commit | f1f7ea210ef41063e597f1f07f8fa8e4747e1b15 | [log] [tgz] |
|---|---|---|
| author | Cindy Liu <hcindyl@google.com> | Fri Aug 18 20:43:27 2023 +0000 |
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | Fri Aug 18 20:43:27 2023 +0000 |
| tree | e9e878a8f36d6a5a640eefadf948104d395ba6fe | |
| parent | a2c167c175cdb50dc76ef656d586b50ea2ddda0f [diff] | |
| parent | 50085e15f519a0ca9e46106405b6b74a336438bc [diff] |
Merge "Add matcha_kelvin_verilog target"
Kelvin is a RISC-V32IM core with a custom instruction set.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog