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opensecura / hw / kelvin / 814bc6c3ec9f287309db9571510f6dc02ab19b1d
commit814bc6c3ec9f287309db9571510f6dc02ab19b1d[log] [tgz]
authorDerek Chow <derekjchow@google.com>Thu Aug 07 14:45:30 2025 -0700
committerDerek Chow <derekjchow@google.com>Thu Aug 07 14:45:30 2025 -0700
tree9194a33a0eb892a702a2eee6aad22d258276b1c6
parente4d283fba5e582c32a83ed693328d25636bdbfd8 [diff]
Update debug docs to reflect new addresses.

Change-Id: I562bf601ebdede9cac970c9e78787a2e04ad4589
1 file changed
tree: 9194a33a0eb892a702a2eee6aad22d258276b1c6
  1. doc/
  2. examples/
  3. external/
  4. fpga/
  5. hdl/
  6. hw_sim/
  7. kelvin_test_utils/
  8. lib/
  9. platforms/
  10. rules/
  11. tests/
  12. third_party/
  13. toolchain/
  14. utils/
  15. .bazelrc
  16. .bazelversion
  17. .gitignore
  18. CONTRIBUTING.md
  19. LICENSE
  20. PREUPLOAD.cfg
  21. README.md
  22. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog