Fix vsubs.u Fix the overflow cap of unsigned saturated subtraction. Bug: 296483050 Change-Id: If675412b6b873b1dc6554c5e7a7941d9329a6e74
Kelvin is a RISC-V32IM core with a custom instruction set.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel build //hdl/chisel:kelvin_cc_library_emit_verilog