commit | 785139588bc2b362aa211117c4eea52b02a2ac6a | [log] [tgz] |
---|---|---|
author | Cindy Liu <hcindyl@google.com> | Thu Oct 19 14:37:15 2023 -0700 |
committer | Cindy Liu <hcindyl@google.com> | Thu Oct 19 14:37:15 2023 -0700 |
tree | 243f390eff7115f462d7402d8c194abaa6545e75 | |
parent | 0959e5392846ee5ed9da1705d2a65343c14cdef5 [diff] |
Add l1dcachebank systemc test Change-Id: I7459fd5dc3645619dfa655956d0d35e448dee55f
Kelvin is a RISC-V32IM core with a custom instruction set.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog