Add l1dcachebank systemc test

Change-Id: I7459fd5dc3645619dfa655956d0d35e448dee55f
3 files changed
tree: 243f390eff7115f462d7402d8c194abaa6545e75
  1. external/
  2. hdl/
  3. lib/
  4. rules/
  5. tests/
  6. utils/
  7. .bazelrc
  8. .gitignore
  9. CONTRIBUTING.md
  10. LICENSE
  11. PREUPLOAD.cfg
  12. README.md
  13. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog