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opensecura
/
hw
/
kelvin
/
72f32eb03ba41751903b5e8de3d445a67294b1d4
/
.
/
hdl
/
verilog
/
rvv
/
design
tree: f5e1be67eb1bb3531a010527d091562dad64edaa [
path history
]
[
tgz
]
Aligner.sv
Aligner_tb.sv
BUILD
MultiFifo.sv
MultiFifo_tb.sv
rvv_backend.sv
rvv_backend_alu.sv
rvv_backend_alu_unit.sv
rvv_backend_alu_unit_addsub.sv
rvv_backend_alu_unit_execution_p1.sv
rvv_backend_alu_unit_mask.sv
rvv_backend_alu_unit_mask_viota.sv
rvv_backend_alu_unit_other.sv
rvv_backend_alu_unit_shift.sv
rvv_backend_decode.sv
rvv_backend_decode_ctrl.sv
rvv_backend_decode_unit.sv
rvv_backend_decode_unit_ari.sv
rvv_backend_decode_unit_lsu.sv
rvv_backend_dispatch.sv
rvv_backend_dispatch_bypass.sv
rvv_backend_dispatch_ctrl.sv
rvv_backend_dispatch_operand.sv
rvv_backend_dispatch_opr_byte_type.sv
rvv_backend_dispatch_raw_uop_rob.sv
rvv_backend_dispatch_raw_uop_uop.sv
rvv_backend_dispatch_structure_hazard.sv
rvv_backend_div.sv
rvv_backend_div_unit.sv
rvv_backend_div_unit_divider.sv
rvv_backend_lsu_remap.sv
rvv_backend_mac_unit.sv
rvv_backend_mul_unit.sv
rvv_backend_mul_unit_mul8.sv
rvv_backend_mulmac.sv
rvv_backend_pmtrdt.sv
rvv_backend_pmtrdt_unit.sv
rvv_backend_retire.sv
rvv_backend_rob.sv
rvv_backend_vrf.sv
rvv_backend_vrf_reg.sv
rvv_dispatch.sv
RvvCore.sv
RvvFrontEnd.sv