Respect queue counts in Lsu and Rvv.

Use the queue counts from Lsu and Rvv instead of
ready/valid to determine if an instruction can be issued.

Change-Id: I2f3915f702ab465c641a0930340e56c326905129
7 files changed
tree: 58042807533ee00141b4fc45a33622a4a4c87824
  1. doc/
  2. examples/
  3. external/
  4. hdl/
  5. hw_sim/
  6. kelvin_test_utils/
  7. lib/
  8. platforms/
  9. rules/
  10. tests/
  11. third_party/
  12. toolchain/
  13. utils/
  14. .bazelrc
  15. .bazelversion
  16. .gitignore
  17. CONTRIBUTING.md
  18. LICENSE
  19. PREUPLOAD.cfg
  20. README.md
  21. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog