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opensecura / hw / kelvin / 707495c9dda43cebc685606ea32c95eb99503b67
commit707495c9dda43cebc685606ea32c95eb99503b67[log] [tgz]
authorYenkai Wang <ykwang@google.com>Mon Sep 08 15:31:10 2025 -0600
committerYenkai Wang <ykwang@google.com>Tue Sep 16 11:59:28 2025 -0600
treebc074ceaa10db430a442306d280c7744ea68981e
parent725eb3bc706816b705d64d6fed12e37a409ccbc1 [diff]
[dv, flow] Add ELF loader feature

Adds a Python script (`utils/elf_to_mem.py`) to parse the test ELF,
generate separate ITCM/DTCM memory files, and extract the 'tohost'
symbol address.

Change-Id: I1fcd97e523206604b1fcb7e6007073263eb9ee14
2 files changed
tree: bc074ceaa10db430a442306d280c7744ea68981e
  1. doc/
  2. examples/
  3. external/
  4. fpga/
  5. hdl/
  6. hw_sim/
  7. kelvin_test_utils/
  8. lib/
  9. platforms/
  10. rules/
  11. tests/
  12. third_party/
  13. toolchain/
  14. utils/
  15. .bazelrc
  16. .bazelversion
  17. .gitignore
  18. CONTRIBUTING.md
  19. LICENSE
  20. PREUPLOAD.cfg
  21. README.md
  22. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog