| commit | 5d616da1c0654af7a59019f0bc72482392711203 | [log] [tgz] |
|---|---|---|
| author | Tianyu Li <Tianyu.Li@verisilicon.com> | Tue Nov 19 14:34:36 2024 +0800 |
| committer | Derek Chow <derekjchow@google.com> | Wed Nov 20 21:41:31 2024 +0000 |
| tree | b32581a65528564ebd06200f87fe2fe86f73f75b | |
| parent | a27e17daf99896e45514efefa3d2acbe5db05945 [diff] |
Complete some mask logic instructions in ALU unit (vmandn,vmand,vmor,vmxor.xmorn.vmnand,vmnor.vmxnor). Change-Id: Ie42faf742dec8bf8c5895538001c2ae8ba87ba9e
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog