| commit | 57ed25d42794ceff2f4c517cb099126c2fa579a6 | [log] [tgz] |
|---|---|---|
| author | Cindy Liu <hcindyl@google.com> | Sat Aug 26 00:26:13 2023 -0700 |
| committer | Cindy Liu <hcindyl@google.com> | Sat Aug 26 00:52:06 2023 -0700 |
| tree | 90a9796bb79bae924cd3c7c744430a347393592b | |
| parent | b10a56f8e6c8dd7f5f97370c42c142476c4c4898 [diff] |
Change verilator to v4.210 to support trace bazel_rules_hdl uses verilator v4.224 that can't support vcd trace properly. Downgrade to v4.210 (same as OT) to enable trace Change-Id: Id9bc40dab7e278281f15d0d40c860c305fd0b074
Kelvin is a RISC-V32IM core with a custom instruction set.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog