commit | 546429bc19e7f968368e1e713140f7022e2f0118 | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Thu Jul 10 19:18:24 2025 -0700 |
committer | Derek Chow <derekjchow@google.com> | Fri Jul 11 14:49:33 2025 -0700 |
tree | 0cbe0bf26d0b8b6d04715a202b185aaf53f939bc | |
parent | b6b2707a85fb5cf72e95799aeaa3c2a3819288f1 [diff] |
Relax size in AXI transactions. Change-Id: I9aa1aff8088f5ada79c27e5ecfd9c360872bf0d7
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog