commit | 502e0d9a666f48d9eab7fe8e67a727e2d4fbe165 | [log] [tgz] |
---|---|---|
author | Alex Van Damme <atv@google.com> | Mon Aug 04 13:35:21 2025 -0700 |
committer | Alex Van Damme <atv@google.com> | Wed Aug 06 16:54:35 2025 -0700 |
tree | 6c39deab1d6483eb42808bc0d29cf2f974b08e0d | |
parent | 3a18e1d3be283f77e66660c5c09face6fa416459 [diff] |
feat(build): Add FPGA toolchain support and enhance binary rules Change-Id: Iede67e519368f5f58ac368cf1d40acc909cd37b0
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog