| commit | 97b73bfa8229815735763bc6335181a8c732ffc8 | [log] [tgz] |
|---|---|---|
| author | zsp_hw_cd_dev <beck.zhang@verisilicon.com> | Tue Aug 05 10:55:33 2025 -0700 |
| committer | Derek Chow <derekjchow@google.com> | Wed Aug 06 13:05:23 2025 -0700 |
| tree | aa7cb6cd0f202006f89216f53f26a0fe408738d9 | |
| parent | 088a57782dbdf57660439a9b53b6cdda89d2d2fb [diff] |
Clean lint warning: W416b,W362,W486... Change-Id: Ie5350b57c334c856fee8815411ea03960649bfa5
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog