| commit | 459b83f8e0cc18fc5c833c1ac525ecd9bc2ac4b5 | [log] [tgz] |
|---|---|---|
| author | Stefan Hall <stefanhall@google.com> | Fri Jun 07 21:23:08 2024 +0000 |
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | Fri Jun 07 21:23:08 2024 +0000 |
| tree | 209f0fe963042ca49626c5adbe546dc631b25af2 | |
| parent | b7e14f71fdafe036d70ab64b32ff10eacc813c95 [diff] | |
| parent | e0f457fd1db26027a2f7cdf3be4816251db5797f [diff] |
Merge "Add Zero Forcing for for power saving"
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog