commit | 423cd185a1c30257dc5b7e99d51e7d6375eb57bf | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Tue Dec 03 16:03:30 2024 -0800 |
committer | Derek Chow <derekjchow@google.com> | Tue Dec 03 16:27:59 2024 -0800 |
tree | d30437516c7acd9d02b7a575d3275826eb1c1654 | |
parent | c8cc22eb33c79d38ff6b1afd2b3b619b0e09e6e4 [diff] |
Remove latching behaviour in Regfile. Change-Id: I1b58ab5dc17b703432ed15cacfc39e32c6ba1843
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog