| commit | 3773efe3262f9c24c05113daae80d0a92d75910d | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Wed Dec 06 16:38:07 2023 -0800 |
| committer | Alex Van Damme <atv@google.com> | Wed Jan 17 10:25:03 2024 -0800 |
| tree | b22a5cfb79f03359a3eee02f985f439c11b741e8 | |
| parent | 418c56048a122e802103577f5f4b5a491aa2b20b [diff] |
Upgrade to Chisel 5.1.0 - Additionally, update verilator in rules_hdl to v4.226, to sync w/ the suggestion version from Chisel. Change-Id: I077d75417c3230777c656ebff59f999f0effeb27
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog