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opensecura / hw / kelvin / 5ae968951d90f9dbb654509853c3e8b8afd635b3
commit5ae968951d90f9dbb654509853c3e8b8afd635b3[log] [tgz]
authorDavid Gao <davidgao@google.com>Wed Sep 17 17:33:03 2025 +0000
committerDavid Gao <davidgao@google.com>Wed Sep 17 13:34:38 2025 -0700
tree201ef10af6c593a1ba2e85204c58d5dfa87ea3f8
parentd28bde072267460cc8680bb736b8e625d87eeb7e [diff]
Fix load segment2 m2 test cases

- set vl correctly
- fix expected output pattern

Because the impl is currently incorrect, the changed test cases now
fail, and are temporarily marked as skipped before we have the fixes.

Change-Id: Ibee12af3d6ae1eca16f59edfa2cc9aa9a1d4a13b
5 files changed
tree: 201ef10af6c593a1ba2e85204c58d5dfa87ea3f8
  1. doc/
  2. examples/
  3. external/
  4. fpga/
  5. hdl/
  6. hw_sim/
  7. kelvin_test_utils/
  8. lib/
  9. platforms/
  10. rules/
  11. tests/
  12. third_party/
  13. toolchain/
  14. utils/
  15. .bazelrc
  16. .bazelversion
  17. .gitignore
  18. CONTRIBUTING.md
  19. LICENSE
  20. PREUPLOAD.cfg
  21. README.md
  22. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog