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opensecura / hw / kelvin / 129b346dcaf2741e4d808876aca51db90fd75c95
commit129b346dcaf2741e4d808876aca51db90fd75c95[log] [tgz]
authorDerek Chow <derekjchow@google.com>Tue Aug 12 12:57:18 2025 -0700
committerDerek Chow <derekjchow@google.com>Tue Aug 12 16:28:02 2025 -0700
tree6e39293675a9af651cc488166e7dce4814919cf9
parent98e88c479e8f4f73e4b7e4a41e30b4b7f50c15ff [diff]
Generic test bench for loads/stores.

Change-Id: I1193581f8240826da99592c6193e58ece7edfb04
5 files changed
tree: 6e39293675a9af651cc488166e7dce4814919cf9
  1. doc/
  2. examples/
  3. external/
  4. fpga/
  5. hdl/
  6. hw_sim/
  7. kelvin_test_utils/
  8. lib/
  9. platforms/
  10. rules/
  11. tests/
  12. third_party/
  13. toolchain/
  14. utils/
  15. .bazelrc
  16. .bazelversion
  17. .gitignore
  18. CONTRIBUTING.md
  19. LICENSE
  20. PREUPLOAD.cfg
  21. README.md
  22. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog