commit | 118fe402685622520f5a54760776e8f5553abcc8 | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Tue Nov 26 12:47:14 2024 -0800 |
committer | Derek Chow <derekjchow@google.com> | Tue Nov 26 13:11:50 2024 -0800 |
tree | a10a41f63dc30f5f99f96f6b9f090baf6b0fd1cc | |
parent | 919dfb5ef9dad644a23a2904ce55174219522fd4 [diff] |
Move Aligner and MultiFifo into design. Change-Id: I6e9e51d32fa5ef580d60886a8c5e608225b0f0de
diff --git a/hdl/verilog/rvv/Aligner.sv b/hdl/verilog/rvv/design/Aligner.sv similarity index 100% rename from hdl/verilog/rvv/Aligner.sv rename to hdl/verilog/rvv/design/Aligner.sv
diff --git a/hdl/verilog/rvv/Aligner_tb.sv b/hdl/verilog/rvv/design/Aligner_tb.sv similarity index 100% rename from hdl/verilog/rvv/Aligner_tb.sv rename to hdl/verilog/rvv/design/Aligner_tb.sv
diff --git a/hdl/verilog/rvv/BUILD b/hdl/verilog/rvv/design/BUILD similarity index 100% rename from hdl/verilog/rvv/BUILD rename to hdl/verilog/rvv/design/BUILD
diff --git a/hdl/verilog/rvv/MultiFifo.sv b/hdl/verilog/rvv/design/MultiFifo.sv similarity index 100% rename from hdl/verilog/rvv/MultiFifo.sv rename to hdl/verilog/rvv/design/MultiFifo.sv
diff --git a/hdl/verilog/rvv/MultiFifo_tb.sv b/hdl/verilog/rvv/design/MultiFifo_tb.sv similarity index 100% rename from hdl/verilog/rvv/MultiFifo_tb.sv rename to hdl/verilog/rvv/design/MultiFifo_tb.sv