| commit | bc08a803a4c5ed553f96ce8d4051f83e3f8f3096 | [log] [tgz] |
|---|---|---|
| author | Derek Chow <derekjchow@google.com> | Thu Feb 20 10:38:33 2025 -0800 |
| committer | Derek Chow <derekjchow@google.com> | Thu Mar 06 14:52:02 2025 -0800 |
| tree | fb6d2b8adb2744fcfcd14ffcc516cca72916e034 | |
| parent | be3bd7f4ea8911dc90c47fce99566ee01eb5f6fc [diff] |
Start microarchitectural documentation. Change-Id: I1ff9bec2de09184c23a3158b0c715c14214784f4
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog
