| // Copyright 2023 Google LLC |
| // |
| // Licensed under the Apache License, Version 2.0 (the "License"); |
| // you may not use this file except in compliance with the License. |
| // You may obtain a copy of the License at |
| // |
| // http://www.apache.org/licenses/LICENSE-2.0 |
| // |
| // Unless required by applicable law or agreed to in writing, software |
| // distributed under the License is distributed on an "AS IS" BASIS, |
| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| // See the License for the specific language governing permissions and |
| // limitations under the License. |
| // |
| // clang-format off |
| |
| {"eexit", 0, INSN_CLASS_K, "", MATCH_EEXIT, MASK_EEXIT, match_opcode, 0 }, |
| {"eyield", 0, INSN_CLASS_K, "", MATCH_EYIELD, MASK_EYIELD, match_opcode, 0 }, |
| {"ectxsw", 0, INSN_CLASS_K, "", MATCH_ECTXSW, MASK_ECTXSW, match_opcode, 0 }, |
| {"mpause", 0, INSN_CLASS_K, "", MATCH_MPAUSE, MASK_MPAUSE, match_opcode, 0 }, |
| |
| {"flog", 0, INSN_CLASS_K, "s", MATCH_FLOG, MASK_FLOG, match_opcode, 0 }, |
| {"slog", 0, INSN_CLASS_K, "s", MATCH_SLOG, MASK_SLOG, match_opcode, 0 }, |
| {"clog", 0, INSN_CLASS_K, "s", MATCH_CLOG, MASK_CLOG, match_opcode, 0 }, |
| {"klog", 0, INSN_CLASS_K, "s", MATCH_KLOG, MASK_KLOG, match_opcode, 0 }, |
| |
| {"flushall", 0, INSN_CLASS_K, "", MATCH_FLUSHALL, MASK_FLUSHALL, match_opcode, 0 }, |
| {"flushat", 0, INSN_CLASS_K, "s", MATCH_FLUSHAT, MASK_FLUSHAT, match_opcode, 0 }, |
| |
| {"getmaxvl.b", 0, INSN_CLASS_K, "d", MATCH_GETMAXVL_B, MASK_GETMAXVL_B, match_opcode, 0 }, |
| {"getmaxvl.h", 0, INSN_CLASS_K, "d", MATCH_GETMAXVL_H, MASK_GETMAXVL_H, match_opcode, 0 }, |
| {"getmaxvl.w", 0, INSN_CLASS_K, "d", MATCH_GETMAXVL_W, MASK_GETMAXVL_W, match_opcode, 0 }, |
| {"getvl.b.x", 0, INSN_CLASS_K, "d,s", MATCH_GETVL_B_X, MASK_GETVL_B_X, match_opcode, 0 }, |
| {"getvl.h.x", 0, INSN_CLASS_K, "d,s", MATCH_GETVL_H_X, MASK_GETVL_H_X, match_opcode, 0 }, |
| {"getvl.w.x", 0, INSN_CLASS_K, "d,s", MATCH_GETVL_W_X, MASK_GETVL_W_X, match_opcode, 0 }, |
| {"getvl.b.xx", 0, INSN_CLASS_K, "d,s,t", MATCH_GETVL_B_XX, MASK_GETVL_B_XX, match_opcode, 0 }, |
| {"getvl.h.xx", 0, INSN_CLASS_K, "d,s,t", MATCH_GETVL_H_XX, MASK_GETVL_H_XX, match_opcode, 0 }, |
| {"getvl.w.xx", 0, INSN_CLASS_K, "d,s,t", MATCH_GETVL_W_XX, MASK_GETVL_W_XX, match_opcode, 0 }, |
| |
| {"getmaxvl.b.m", 0, INSN_CLASS_K, "d", MATCH_GETMAXVL_B_M, MASK_GETMAXVL_B_M, match_opcode, 0 }, |
| {"getmaxvl.h.m", 0, INSN_CLASS_K, "d", MATCH_GETMAXVL_H_M, MASK_GETMAXVL_H_M, match_opcode, 0 }, |
| {"getmaxvl.w.m", 0, INSN_CLASS_K, "d", MATCH_GETMAXVL_W_M, MASK_GETMAXVL_W_M, match_opcode, 0 }, |
| {"getvl.b.x.m", 0, INSN_CLASS_K, "d,s", MATCH_GETVL_B_X_M, MASK_GETVL_B_X_M, match_opcode, 0 }, |
| {"getvl.h.x.m", 0, INSN_CLASS_K, "d,s", MATCH_GETVL_H_X_M, MASK_GETVL_H_X_M, match_opcode, 0 }, |
| {"getvl.w.x.m", 0, INSN_CLASS_K, "d,s", MATCH_GETVL_W_X_M, MASK_GETVL_W_X_M, match_opcode, 0 }, |
| {"getvl.b.xx.m", 0, INSN_CLASS_K, "d,s,t", MATCH_GETVL_B_XX_M, MASK_GETVL_B_XX_M, match_opcode, 0 }, |
| {"getvl.h.xx.m", 0, INSN_CLASS_K, "d,s,t", MATCH_GETVL_H_XX_M, MASK_GETVL_H_XX_M, match_opcode, 0 }, |
| {"getvl.w.xx.m", 0, INSN_CLASS_K, "d,s,t", MATCH_GETVL_W_XX_M, MASK_GETVL_W_XX_M, match_opcode, 0 }, |
| |
| // 111 Load/Store |
| {"vld.b.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_B_X, MASK_VLD_B_X, match_opcode, 0 }, |
| {"vld.b.p.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_B_P_X, MASK_VLD_B_P_X, match_opcode, 0 }, |
| {"vld.b.l.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_L_XX, MASK_VLD_B_L_XX, match_opcode, 0 }, |
| {"vld.b.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_S_XX, MASK_VLD_B_S_XX, match_opcode, 0 }, |
| {"vld.b.p.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_P_XX, MASK_VLD_B_P_XX, match_opcode, 0 }, |
| {"vld.b.lp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_LP_XX, MASK_VLD_B_LP_XX, match_opcode, 0 }, |
| {"vld.b.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_SP_XX, MASK_VLD_B_SP_XX, match_opcode, 0 }, |
| {"vld.b.tp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_TP_XX, MASK_VLD_B_TP_XX, match_opcode, 0 }, |
| {"vld.b.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_B_X_M, MASK_VLD_B_X_M, match_opcode, 0 }, |
| {"vld.b.p.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_B_P_X_M, MASK_VLD_B_P_X_M, match_opcode, 0 }, |
| {"vld.b.l.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_L_XX_M, MASK_VLD_B_L_XX_M, match_opcode, 0 }, |
| {"vld.b.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_S_XX_M, MASK_VLD_B_S_XX_M, match_opcode, 0 }, |
| {"vld.b.p.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_P_XX_M, MASK_VLD_B_P_XX_M, match_opcode, 0 }, |
| {"vld.b.lp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_LP_XX_M, MASK_VLD_B_LP_XX_M, match_opcode, 0 }, |
| {"vld.b.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_SP_XX_M, MASK_VLD_B_SP_XX_M, match_opcode, 0 }, |
| {"vld.b.tp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_B_TP_XX_M, MASK_VLD_B_TP_XX_M, match_opcode, 0 }, |
| {"vld.h.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_H_X, MASK_VLD_H_X, match_opcode, 0 }, |
| {"vld.h.p.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_H_P_X, MASK_VLD_H_P_X, match_opcode, 0 }, |
| {"vld.h.l.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_L_XX, MASK_VLD_H_L_XX, match_opcode, 0 }, |
| {"vld.h.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_S_XX, MASK_VLD_H_S_XX, match_opcode, 0 }, |
| {"vld.h.p.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_P_XX, MASK_VLD_H_P_XX, match_opcode, 0 }, |
| {"vld.h.lp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_LP_XX, MASK_VLD_H_LP_XX, match_opcode, 0 }, |
| {"vld.h.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_SP_XX, MASK_VLD_H_SP_XX, match_opcode, 0 }, |
| {"vld.h.tp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_TP_XX, MASK_VLD_H_TP_XX, match_opcode, 0 }, |
| {"vld.h.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_H_X_M, MASK_VLD_H_X_M, match_opcode, 0 }, |
| {"vld.h.p.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_H_P_X_M, MASK_VLD_H_P_X_M, match_opcode, 0 }, |
| {"vld.h.l.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_L_XX_M, MASK_VLD_H_L_XX_M, match_opcode, 0 }, |
| {"vld.h.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_S_XX_M, MASK_VLD_H_S_XX_M, match_opcode, 0 }, |
| {"vld.h.p.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_P_XX_M, MASK_VLD_H_P_XX_M, match_opcode, 0 }, |
| {"vld.h.lp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_LP_XX_M, MASK_VLD_H_LP_XX_M, match_opcode, 0 }, |
| {"vld.h.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_SP_XX_M, MASK_VLD_H_SP_XX_M, match_opcode, 0 }, |
| {"vld.h.tp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_H_TP_XX_M, MASK_VLD_H_TP_XX_M, match_opcode, 0 }, |
| {"vld.w.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_W_X, MASK_VLD_W_X, match_opcode, 0 }, |
| {"vld.w.p.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_W_P_X, MASK_VLD_W_P_X, match_opcode, 0 }, |
| {"vld.w.l.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_L_XX, MASK_VLD_W_L_XX, match_opcode, 0 }, |
| {"vld.w.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_S_XX, MASK_VLD_W_S_XX, match_opcode, 0 }, |
| {"vld.w.p.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_P_XX, MASK_VLD_W_P_XX, match_opcode, 0 }, |
| {"vld.w.lp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_LP_XX, MASK_VLD_W_LP_XX, match_opcode, 0 }, |
| {"vld.w.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_SP_XX, MASK_VLD_W_SP_XX, match_opcode, 0 }, |
| {"vld.w.tp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_TP_XX, MASK_VLD_W_TP_XX, match_opcode, 0 }, |
| {"vld.w.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_W_X_M, MASK_VLD_W_X_M, match_opcode, 0 }, |
| {"vld.w.p.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VLD_W_P_X_M, MASK_VLD_W_P_X_M, match_opcode, 0 }, |
| {"vld.w.l.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_L_XX_M, MASK_VLD_W_L_XX_M, match_opcode, 0 }, |
| {"vld.w.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_S_XX_M, MASK_VLD_W_S_XX_M, match_opcode, 0 }, |
| {"vld.w.p.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_P_XX_M, MASK_VLD_W_P_XX_M, match_opcode, 0 }, |
| {"vld.w.lp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_LP_XX_M, MASK_VLD_W_LP_XX_M, match_opcode, 0 }, |
| {"vld.w.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_SP_XX_M, MASK_VLD_W_SP_XX_M, match_opcode, 0 }, |
| {"vld.w.tp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VLD_W_TP_XX_M, MASK_VLD_W_TP_XX_M, match_opcode, 0 }, |
| {"vst.b.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_B_X, MASK_VST_B_X, match_opcode, 0 }, |
| {"vst.b.p.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_B_P_X, MASK_VST_B_P_X, match_opcode, 0 }, |
| {"vst.b.l.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_L_XX, MASK_VST_B_L_XX, match_opcode, 0 }, |
| {"vst.b.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_S_XX, MASK_VST_B_S_XX, match_opcode, 0 }, |
| {"vst.b.p.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_P_XX, MASK_VST_B_P_XX, match_opcode, 0 }, |
| {"vst.b.lp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_LP_XX, MASK_VST_B_LP_XX, match_opcode, 0 }, |
| {"vst.b.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_SP_XX, MASK_VST_B_SP_XX, match_opcode, 0 }, |
| {"vst.b.tp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_TP_XX, MASK_VST_B_TP_XX, match_opcode, 0 }, |
| {"vst.b.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_B_X_M, MASK_VST_B_X_M, match_opcode, 0 }, |
| {"vst.b.p.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_B_P_X_M, MASK_VST_B_P_X_M, match_opcode, 0 }, |
| {"vst.b.l.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_L_XX_M, MASK_VST_B_L_XX_M, match_opcode, 0 }, |
| {"vst.b.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_S_XX_M, MASK_VST_B_S_XX_M, match_opcode, 0 }, |
| {"vst.b.p.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_P_XX_M, MASK_VST_B_P_XX_M, match_opcode, 0 }, |
| {"vst.b.lp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_LP_XX_M, MASK_VST_B_LP_XX_M, match_opcode, 0 }, |
| {"vst.b.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_SP_XX_M, MASK_VST_B_SP_XX_M, match_opcode, 0 }, |
| {"vst.b.tp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_B_TP_XX_M, MASK_VST_B_TP_XX_M, match_opcode, 0 }, |
| {"vst.h.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_H_X, MASK_VST_H_X, match_opcode, 0 }, |
| {"vst.h.p.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_H_P_X, MASK_VST_H_P_X, match_opcode, 0 }, |
| {"vst.h.l.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_L_XX, MASK_VST_H_L_XX, match_opcode, 0 }, |
| {"vst.h.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_S_XX, MASK_VST_H_S_XX, match_opcode, 0 }, |
| {"vst.h.p.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_P_XX, MASK_VST_H_P_XX, match_opcode, 0 }, |
| {"vst.h.lp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_LP_XX, MASK_VST_H_LP_XX, match_opcode, 0 }, |
| {"vst.h.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_SP_XX, MASK_VST_H_SP_XX, match_opcode, 0 }, |
| {"vst.h.tp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_TP_XX, MASK_VST_H_TP_XX, match_opcode, 0 }, |
| {"vst.h.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_H_X_M, MASK_VST_H_X_M, match_opcode, 0 }, |
| {"vst.h.p.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_H_P_X_M, MASK_VST_H_P_X_M, match_opcode, 0 }, |
| {"vst.h.l.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_L_XX_M, MASK_VST_H_L_XX_M, match_opcode, 0 }, |
| {"vst.h.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_S_XX_M, MASK_VST_H_S_XX_M, match_opcode, 0 }, |
| {"vst.h.p.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_P_XX_M, MASK_VST_H_P_XX_M, match_opcode, 0 }, |
| {"vst.h.lp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_LP_XX_M, MASK_VST_H_LP_XX_M, match_opcode, 0 }, |
| {"vst.h.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_SP_XX_M, MASK_VST_H_SP_XX_M, match_opcode, 0 }, |
| {"vst.h.tp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_H_TP_XX_M, MASK_VST_H_TP_XX_M, match_opcode, 0 }, |
| {"vst.w.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_W_X, MASK_VST_W_X, match_opcode, 0 }, |
| {"vst.w.p.x", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_W_P_X, MASK_VST_W_P_X, match_opcode, 0 }, |
| {"vst.w.l.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_L_XX, MASK_VST_W_L_XX, match_opcode, 0 }, |
| {"vst.w.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_S_XX, MASK_VST_W_S_XX, match_opcode, 0 }, |
| {"vst.w.p.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_P_XX, MASK_VST_W_P_XX, match_opcode, 0 }, |
| {"vst.w.lp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_LP_XX, MASK_VST_W_LP_XX, match_opcode, 0 }, |
| {"vst.w.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_SP_XX, MASK_VST_W_SP_XX, match_opcode, 0 }, |
| {"vst.w.tp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_TP_XX, MASK_VST_W_TP_XX, match_opcode, 0 }, |
| {"vst.w.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_W_X_M, MASK_VST_W_X_M, match_opcode, 0 }, |
| {"vst.w.p.x.m", 0, INSN_CLASS_K, "Vd,s", MATCH_VST_W_P_X_M, MASK_VST_W_P_X_M, match_opcode, 0 }, |
| {"vst.w.l.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_L_XX_M, MASK_VST_W_L_XX_M, match_opcode, 0 }, |
| {"vst.w.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_S_XX_M, MASK_VST_W_S_XX_M, match_opcode, 0 }, |
| {"vst.w.p.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_P_XX_M, MASK_VST_W_P_XX_M, match_opcode, 0 }, |
| {"vst.w.lp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_LP_XX_M, MASK_VST_W_LP_XX_M, match_opcode, 0 }, |
| {"vst.w.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_SP_XX_M, MASK_VST_W_SP_XX_M, match_opcode, 0 }, |
| {"vst.w.tp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VST_W_TP_XX_M, MASK_VST_W_TP_XX_M, match_opcode, 0 }, |
| {"vdup.b.x", 0, INSN_CLASS_K, "Vd,t", MATCH_VDUP_B_X, MASK_VDUP_B_X, match_opcode, 0 }, |
| {"vdup.b.x.m", 0, INSN_CLASS_K, "Vd,t", MATCH_VDUP_B_X_M, MASK_VDUP_B_X_M, match_opcode, 0 }, |
| {"vdup.h.x", 0, INSN_CLASS_K, "Vd,t", MATCH_VDUP_H_X, MASK_VDUP_H_X, match_opcode, 0 }, |
| {"vdup.h.x.m", 0, INSN_CLASS_K, "Vd,t", MATCH_VDUP_H_X_M, MASK_VDUP_H_X_M, match_opcode, 0 }, |
| {"vdup.w.x", 0, INSN_CLASS_K, "Vd,t", MATCH_VDUP_W_X, MASK_VDUP_W_X, match_opcode, 0 }, |
| {"vdup.w.x.m", 0, INSN_CLASS_K, "Vd,t", MATCH_VDUP_W_X_M, MASK_VDUP_W_X_M, match_opcode, 0 }, |
| {"vcget", 0, INSN_CLASS_K, "Vd", MATCH_VCGET, MASK_VCGET, match_opcode, 0 }, |
| {"vstq.b.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_B_S_XX, MASK_VSTQ_B_S_XX, match_opcode, 0 }, |
| {"vstq.b.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_B_SP_XX, MASK_VSTQ_B_SP_XX, match_opcode, 0 }, |
| {"vstq.b.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_B_S_XX_M, MASK_VSTQ_B_S_XX_M, match_opcode, 0 }, |
| {"vstq.b.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_B_SP_XX_M, MASK_VSTQ_B_SP_XX_M, match_opcode, 0 }, |
| {"vstq.h.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_H_S_XX, MASK_VSTQ_H_S_XX, match_opcode, 0 }, |
| {"vstq.h.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_H_SP_XX, MASK_VSTQ_H_SP_XX, match_opcode, 0 }, |
| {"vstq.h.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_H_S_XX_M, MASK_VSTQ_H_S_XX_M, match_opcode, 0 }, |
| {"vstq.h.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_H_SP_XX_M, MASK_VSTQ_H_SP_XX_M, match_opcode, 0 }, |
| {"vstq.w.s.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_W_S_XX, MASK_VSTQ_W_S_XX, match_opcode, 0 }, |
| {"vstq.w.sp.xx", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_W_SP_XX, MASK_VSTQ_W_SP_XX, match_opcode, 0 }, |
| {"vstq.w.s.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_W_S_XX_M, MASK_VSTQ_W_S_XX_M, match_opcode, 0 }, |
| {"vstq.w.sp.xx.m", 0, INSN_CLASS_K, "Vd,s,t", MATCH_VSTQ_W_SP_XX_M, MASK_VSTQ_W_SP_XX_M, match_opcode, 0 }, |
| |
| // 000 Arithmetic |
| {"vadd.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD_B_VV, MASK_VADD_B_VV, match_opcode, 0 }, |
| {"vadd.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD_B_VX, MASK_VADD_B_VX, match_opcode, 0 }, |
| {"vadd.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD_B_VV_M, MASK_VADD_B_VV_M, match_opcode, 0 }, |
| {"vadd.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD_B_VX_M, MASK_VADD_B_VX_M, match_opcode, 0 }, |
| {"vadd.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD_H_VV, MASK_VADD_H_VV, match_opcode, 0 }, |
| {"vadd.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD_H_VX, MASK_VADD_H_VX, match_opcode, 0 }, |
| {"vadd.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD_H_VV_M, MASK_VADD_H_VV_M, match_opcode, 0 }, |
| {"vadd.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD_H_VX_M, MASK_VADD_H_VX_M, match_opcode, 0 }, |
| {"vadd.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD_W_VV, MASK_VADD_W_VV, match_opcode, 0 }, |
| {"vadd.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD_W_VX, MASK_VADD_W_VX, match_opcode, 0 }, |
| {"vadd.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD_W_VV_M, MASK_VADD_W_VV_M, match_opcode, 0 }, |
| {"vadd.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD_W_VX_M, MASK_VADD_W_VX_M, match_opcode, 0 }, |
| {"vsub.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUB_B_VV, MASK_VSUB_B_VV, match_opcode, 0 }, |
| {"vsub.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUB_B_VX, MASK_VSUB_B_VX, match_opcode, 0 }, |
| {"vsub.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUB_B_VV_M, MASK_VSUB_B_VV_M, match_opcode, 0 }, |
| {"vsub.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUB_B_VX_M, MASK_VSUB_B_VX_M, match_opcode, 0 }, |
| {"vsub.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUB_H_VV, MASK_VSUB_H_VV, match_opcode, 0 }, |
| {"vsub.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUB_H_VX, MASK_VSUB_H_VX, match_opcode, 0 }, |
| {"vsub.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUB_H_VV_M, MASK_VSUB_H_VV_M, match_opcode, 0 }, |
| {"vsub.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUB_H_VX_M, MASK_VSUB_H_VX_M, match_opcode, 0 }, |
| {"vsub.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUB_W_VV, MASK_VSUB_W_VV, match_opcode, 0 }, |
| {"vsub.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUB_W_VX, MASK_VSUB_W_VX, match_opcode, 0 }, |
| {"vsub.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUB_W_VV_M, MASK_VSUB_W_VV_M, match_opcode, 0 }, |
| {"vsub.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUB_W_VX_M, MASK_VSUB_W_VX_M, match_opcode, 0 }, |
| {"vrsub.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VRSUB_B_VX, MASK_VRSUB_B_VX, match_opcode, 0 }, |
| {"vrsub.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VRSUB_B_VX_M, MASK_VRSUB_B_VX_M, match_opcode, 0 }, |
| {"vrsub.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VRSUB_H_VX, MASK_VRSUB_H_VX, match_opcode, 0 }, |
| {"vrsub.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VRSUB_H_VX_M, MASK_VRSUB_H_VX_M, match_opcode, 0 }, |
| {"vrsub.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VRSUB_W_VX, MASK_VRSUB_W_VX, match_opcode, 0 }, |
| {"vrsub.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VRSUB_W_VX_M, MASK_VRSUB_W_VX_M, match_opcode, 0 }, |
| {"veq.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEQ_B_VV, MASK_VEQ_B_VV, match_opcode, 0 }, |
| {"veq.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEQ_B_VX, MASK_VEQ_B_VX, match_opcode, 0 }, |
| {"veq.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEQ_B_VV_M, MASK_VEQ_B_VV_M, match_opcode, 0 }, |
| {"veq.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEQ_B_VX_M, MASK_VEQ_B_VX_M, match_opcode, 0 }, |
| {"veq.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEQ_H_VV, MASK_VEQ_H_VV, match_opcode, 0 }, |
| {"veq.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEQ_H_VX, MASK_VEQ_H_VX, match_opcode, 0 }, |
| {"veq.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEQ_H_VV_M, MASK_VEQ_H_VV_M, match_opcode, 0 }, |
| {"veq.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEQ_H_VX_M, MASK_VEQ_H_VX_M, match_opcode, 0 }, |
| {"veq.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEQ_W_VV, MASK_VEQ_W_VV, match_opcode, 0 }, |
| {"veq.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEQ_W_VX, MASK_VEQ_W_VX, match_opcode, 0 }, |
| {"veq.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEQ_W_VV_M, MASK_VEQ_W_VV_M, match_opcode, 0 }, |
| {"veq.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEQ_W_VX_M, MASK_VEQ_W_VX_M, match_opcode, 0 }, |
| {"vne.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VNE_B_VV, MASK_VNE_B_VV, match_opcode, 0 }, |
| {"vne.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VNE_B_VX, MASK_VNE_B_VX, match_opcode, 0 }, |
| {"vne.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VNE_B_VV_M, MASK_VNE_B_VV_M, match_opcode, 0 }, |
| {"vne.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VNE_B_VX_M, MASK_VNE_B_VX_M, match_opcode, 0 }, |
| {"vne.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VNE_H_VV, MASK_VNE_H_VV, match_opcode, 0 }, |
| {"vne.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VNE_H_VX, MASK_VNE_H_VX, match_opcode, 0 }, |
| {"vne.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VNE_H_VV_M, MASK_VNE_H_VV_M, match_opcode, 0 }, |
| {"vne.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VNE_H_VX_M, MASK_VNE_H_VX_M, match_opcode, 0 }, |
| {"vne.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VNE_W_VV, MASK_VNE_W_VV, match_opcode, 0 }, |
| {"vne.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VNE_W_VX, MASK_VNE_W_VX, match_opcode, 0 }, |
| {"vne.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VNE_W_VV_M, MASK_VNE_W_VV_M, match_opcode, 0 }, |
| {"vne.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VNE_W_VX_M, MASK_VNE_W_VX_M, match_opcode, 0 }, |
| {"vlt.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_B_VV, MASK_VLT_B_VV, match_opcode, 0 }, |
| {"vlt.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_B_VX, MASK_VLT_B_VX, match_opcode, 0 }, |
| {"vlt.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_B_U_VV, MASK_VLT_B_U_VV, match_opcode, 0 }, |
| {"vlt.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_B_U_VX, MASK_VLT_B_U_VX, match_opcode, 0 }, |
| {"vlt.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_B_VV_M, MASK_VLT_B_VV_M, match_opcode, 0 }, |
| {"vlt.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_B_VX_M, MASK_VLT_B_VX_M, match_opcode, 0 }, |
| {"vlt.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_B_U_VV_M, MASK_VLT_B_U_VV_M, match_opcode, 0 }, |
| {"vlt.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_B_U_VX_M, MASK_VLT_B_U_VX_M, match_opcode, 0 }, |
| {"vlt.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_H_VV, MASK_VLT_H_VV, match_opcode, 0 }, |
| {"vlt.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_H_VX, MASK_VLT_H_VX, match_opcode, 0 }, |
| {"vlt.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_H_U_VV, MASK_VLT_H_U_VV, match_opcode, 0 }, |
| {"vlt.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_H_U_VX, MASK_VLT_H_U_VX, match_opcode, 0 }, |
| {"vlt.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_H_VV_M, MASK_VLT_H_VV_M, match_opcode, 0 }, |
| {"vlt.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_H_VX_M, MASK_VLT_H_VX_M, match_opcode, 0 }, |
| {"vlt.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_H_U_VV_M, MASK_VLT_H_U_VV_M, match_opcode, 0 }, |
| {"vlt.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_H_U_VX_M, MASK_VLT_H_U_VX_M, match_opcode, 0 }, |
| {"vlt.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_W_VV, MASK_VLT_W_VV, match_opcode, 0 }, |
| {"vlt.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_W_VX, MASK_VLT_W_VX, match_opcode, 0 }, |
| {"vlt.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_W_U_VV, MASK_VLT_W_U_VV, match_opcode, 0 }, |
| {"vlt.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_W_U_VX, MASK_VLT_W_U_VX, match_opcode, 0 }, |
| {"vlt.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_W_VV_M, MASK_VLT_W_VV_M, match_opcode, 0 }, |
| {"vlt.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_W_VX_M, MASK_VLT_W_VX_M, match_opcode, 0 }, |
| {"vlt.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLT_W_U_VV_M, MASK_VLT_W_U_VV_M, match_opcode, 0 }, |
| {"vlt.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLT_W_U_VX_M, MASK_VLT_W_U_VX_M, match_opcode, 0 }, |
| {"vle.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_B_VV, MASK_VLE_B_VV, match_opcode, 0 }, |
| {"vle.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_B_VX, MASK_VLE_B_VX, match_opcode, 0 }, |
| {"vle.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_B_U_VV, MASK_VLE_B_U_VV, match_opcode, 0 }, |
| {"vle.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_B_U_VX, MASK_VLE_B_U_VX, match_opcode, 0 }, |
| {"vle.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_B_VV_M, MASK_VLE_B_VV_M, match_opcode, 0 }, |
| {"vle.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_B_VX_M, MASK_VLE_B_VX_M, match_opcode, 0 }, |
| {"vle.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_B_U_VV_M, MASK_VLE_B_U_VV_M, match_opcode, 0 }, |
| {"vle.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_B_U_VX_M, MASK_VLE_B_U_VX_M, match_opcode, 0 }, |
| {"vle.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_H_VV, MASK_VLE_H_VV, match_opcode, 0 }, |
| {"vle.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_H_VX, MASK_VLE_H_VX, match_opcode, 0 }, |
| {"vle.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_H_U_VV, MASK_VLE_H_U_VV, match_opcode, 0 }, |
| {"vle.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_H_U_VX, MASK_VLE_H_U_VX, match_opcode, 0 }, |
| {"vle.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_H_VV_M, MASK_VLE_H_VV_M, match_opcode, 0 }, |
| {"vle.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_H_VX_M, MASK_VLE_H_VX_M, match_opcode, 0 }, |
| {"vle.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_H_U_VV_M, MASK_VLE_H_U_VV_M, match_opcode, 0 }, |
| {"vle.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_H_U_VX_M, MASK_VLE_H_U_VX_M, match_opcode, 0 }, |
| {"vle.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_W_VV, MASK_VLE_W_VV, match_opcode, 0 }, |
| {"vle.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_W_VX, MASK_VLE_W_VX, match_opcode, 0 }, |
| {"vle.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_W_U_VV, MASK_VLE_W_U_VV, match_opcode, 0 }, |
| {"vle.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_W_U_VX, MASK_VLE_W_U_VX, match_opcode, 0 }, |
| {"vle.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_W_VV_M, MASK_VLE_W_VV_M, match_opcode, 0 }, |
| {"vle.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_W_VX_M, MASK_VLE_W_VX_M, match_opcode, 0 }, |
| {"vle.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VLE_W_U_VV_M, MASK_VLE_W_U_VV_M, match_opcode, 0 }, |
| {"vle.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VLE_W_U_VX_M, MASK_VLE_W_U_VX_M, match_opcode, 0 }, |
| {"vgt.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_B_VV, MASK_VGT_B_VV, match_opcode, 0 }, |
| {"vgt.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_B_VX, MASK_VGT_B_VX, match_opcode, 0 }, |
| {"vgt.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_B_U_VV, MASK_VGT_B_U_VV, match_opcode, 0 }, |
| {"vgt.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_B_U_VX, MASK_VGT_B_U_VX, match_opcode, 0 }, |
| {"vgt.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_B_VV_M, MASK_VGT_B_VV_M, match_opcode, 0 }, |
| {"vgt.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_B_VX_M, MASK_VGT_B_VX_M, match_opcode, 0 }, |
| {"vgt.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_B_U_VV_M, MASK_VGT_B_U_VV_M, match_opcode, 0 }, |
| {"vgt.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_B_U_VX_M, MASK_VGT_B_U_VX_M, match_opcode, 0 }, |
| {"vgt.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_H_VV, MASK_VGT_H_VV, match_opcode, 0 }, |
| {"vgt.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_H_VX, MASK_VGT_H_VX, match_opcode, 0 }, |
| {"vgt.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_H_U_VV, MASK_VGT_H_U_VV, match_opcode, 0 }, |
| {"vgt.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_H_U_VX, MASK_VGT_H_U_VX, match_opcode, 0 }, |
| {"vgt.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_H_VV_M, MASK_VGT_H_VV_M, match_opcode, 0 }, |
| {"vgt.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_H_VX_M, MASK_VGT_H_VX_M, match_opcode, 0 }, |
| {"vgt.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_H_U_VV_M, MASK_VGT_H_U_VV_M, match_opcode, 0 }, |
| {"vgt.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_H_U_VX_M, MASK_VGT_H_U_VX_M, match_opcode, 0 }, |
| {"vgt.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_W_VV, MASK_VGT_W_VV, match_opcode, 0 }, |
| {"vgt.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_W_VX, MASK_VGT_W_VX, match_opcode, 0 }, |
| {"vgt.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_W_U_VV, MASK_VGT_W_U_VV, match_opcode, 0 }, |
| {"vgt.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_W_U_VX, MASK_VGT_W_U_VX, match_opcode, 0 }, |
| {"vgt.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_W_VV_M, MASK_VGT_W_VV_M, match_opcode, 0 }, |
| {"vgt.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_W_VX_M, MASK_VGT_W_VX_M, match_opcode, 0 }, |
| {"vgt.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGT_W_U_VV_M, MASK_VGT_W_U_VV_M, match_opcode, 0 }, |
| {"vgt.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGT_W_U_VX_M, MASK_VGT_W_U_VX_M, match_opcode, 0 }, |
| {"vge.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_B_VV, MASK_VGE_B_VV, match_opcode, 0 }, |
| {"vge.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_B_VX, MASK_VGE_B_VX, match_opcode, 0 }, |
| {"vge.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_B_U_VV, MASK_VGE_B_U_VV, match_opcode, 0 }, |
| {"vge.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_B_U_VX, MASK_VGE_B_U_VX, match_opcode, 0 }, |
| {"vge.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_B_VV_M, MASK_VGE_B_VV_M, match_opcode, 0 }, |
| {"vge.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_B_VX_M, MASK_VGE_B_VX_M, match_opcode, 0 }, |
| {"vge.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_B_U_VV_M, MASK_VGE_B_U_VV_M, match_opcode, 0 }, |
| {"vge.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_B_U_VX_M, MASK_VGE_B_U_VX_M, match_opcode, 0 }, |
| {"vge.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_H_VV, MASK_VGE_H_VV, match_opcode, 0 }, |
| {"vge.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_H_VX, MASK_VGE_H_VX, match_opcode, 0 }, |
| {"vge.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_H_U_VV, MASK_VGE_H_U_VV, match_opcode, 0 }, |
| {"vge.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_H_U_VX, MASK_VGE_H_U_VX, match_opcode, 0 }, |
| {"vge.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_H_VV_M, MASK_VGE_H_VV_M, match_opcode, 0 }, |
| {"vge.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_H_VX_M, MASK_VGE_H_VX_M, match_opcode, 0 }, |
| {"vge.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_H_U_VV_M, MASK_VGE_H_U_VV_M, match_opcode, 0 }, |
| {"vge.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_H_U_VX_M, MASK_VGE_H_U_VX_M, match_opcode, 0 }, |
| {"vge.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_W_VV, MASK_VGE_W_VV, match_opcode, 0 }, |
| {"vge.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_W_VX, MASK_VGE_W_VX, match_opcode, 0 }, |
| {"vge.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_W_U_VV, MASK_VGE_W_U_VV, match_opcode, 0 }, |
| {"vge.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_W_U_VX, MASK_VGE_W_U_VX, match_opcode, 0 }, |
| {"vge.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_W_VV_M, MASK_VGE_W_VV_M, match_opcode, 0 }, |
| {"vge.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_W_VX_M, MASK_VGE_W_VX_M, match_opcode, 0 }, |
| {"vge.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VGE_W_U_VV_M, MASK_VGE_W_U_VV_M, match_opcode, 0 }, |
| {"vge.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VGE_W_U_VX_M, MASK_VGE_W_U_VX_M, match_opcode, 0 }, |
| {"vabsd.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_B_VV, MASK_VABSD_B_VV, match_opcode, 0 }, |
| {"vabsd.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_B_VX, MASK_VABSD_B_VX, match_opcode, 0 }, |
| {"vabsd.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_B_U_VV, MASK_VABSD_B_U_VV, match_opcode, 0 }, |
| {"vabsd.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_B_U_VX, MASK_VABSD_B_U_VX, match_opcode, 0 }, |
| {"vabsd.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_B_VV_M, MASK_VABSD_B_VV_M, match_opcode, 0 }, |
| {"vabsd.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_B_VX_M, MASK_VABSD_B_VX_M, match_opcode, 0 }, |
| {"vabsd.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_B_U_VV_M, MASK_VABSD_B_U_VV_M, match_opcode, 0 }, |
| {"vabsd.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_B_U_VX_M, MASK_VABSD_B_U_VX_M, match_opcode, 0 }, |
| {"vabsd.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_H_VV, MASK_VABSD_H_VV, match_opcode, 0 }, |
| {"vabsd.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_H_VX, MASK_VABSD_H_VX, match_opcode, 0 }, |
| {"vabsd.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_H_U_VV, MASK_VABSD_H_U_VV, match_opcode, 0 }, |
| {"vabsd.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_H_U_VX, MASK_VABSD_H_U_VX, match_opcode, 0 }, |
| {"vabsd.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_H_VV_M, MASK_VABSD_H_VV_M, match_opcode, 0 }, |
| {"vabsd.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_H_VX_M, MASK_VABSD_H_VX_M, match_opcode, 0 }, |
| {"vabsd.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_H_U_VV_M, MASK_VABSD_H_U_VV_M, match_opcode, 0 }, |
| {"vabsd.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_H_U_VX_M, MASK_VABSD_H_U_VX_M, match_opcode, 0 }, |
| {"vabsd.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_W_VV, MASK_VABSD_W_VV, match_opcode, 0 }, |
| {"vabsd.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_W_VX, MASK_VABSD_W_VX, match_opcode, 0 }, |
| {"vabsd.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_W_U_VV, MASK_VABSD_W_U_VV, match_opcode, 0 }, |
| {"vabsd.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_W_U_VX, MASK_VABSD_W_U_VX, match_opcode, 0 }, |
| {"vabsd.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_W_VV_M, MASK_VABSD_W_VV_M, match_opcode, 0 }, |
| {"vabsd.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_W_VX_M, MASK_VABSD_W_VX_M, match_opcode, 0 }, |
| {"vabsd.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VABSD_W_U_VV_M, MASK_VABSD_W_U_VV_M, match_opcode, 0 }, |
| {"vabsd.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VABSD_W_U_VX_M, MASK_VABSD_W_U_VX_M, match_opcode, 0 }, |
| {"vmax.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_B_VV, MASK_VMAX_B_VV, match_opcode, 0 }, |
| {"vmax.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_B_VX, MASK_VMAX_B_VX, match_opcode, 0 }, |
| {"vmax.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_B_U_VV, MASK_VMAX_B_U_VV, match_opcode, 0 }, |
| {"vmax.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_B_U_VX, MASK_VMAX_B_U_VX, match_opcode, 0 }, |
| {"vmax.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_B_VV_M, MASK_VMAX_B_VV_M, match_opcode, 0 }, |
| {"vmax.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_B_VX_M, MASK_VMAX_B_VX_M, match_opcode, 0 }, |
| {"vmax.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_B_U_VV_M, MASK_VMAX_B_U_VV_M, match_opcode, 0 }, |
| {"vmax.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_B_U_VX_M, MASK_VMAX_B_U_VX_M, match_opcode, 0 }, |
| {"vmax.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_H_VV, MASK_VMAX_H_VV, match_opcode, 0 }, |
| {"vmax.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_H_VX, MASK_VMAX_H_VX, match_opcode, 0 }, |
| {"vmax.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_H_U_VV, MASK_VMAX_H_U_VV, match_opcode, 0 }, |
| {"vmax.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_H_U_VX, MASK_VMAX_H_U_VX, match_opcode, 0 }, |
| {"vmax.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_H_VV_M, MASK_VMAX_H_VV_M, match_opcode, 0 }, |
| {"vmax.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_H_VX_M, MASK_VMAX_H_VX_M, match_opcode, 0 }, |
| {"vmax.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_H_U_VV_M, MASK_VMAX_H_U_VV_M, match_opcode, 0 }, |
| {"vmax.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_H_U_VX_M, MASK_VMAX_H_U_VX_M, match_opcode, 0 }, |
| {"vmax.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_W_VV, MASK_VMAX_W_VV, match_opcode, 0 }, |
| {"vmax.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_W_VX, MASK_VMAX_W_VX, match_opcode, 0 }, |
| {"vmax.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_W_U_VV, MASK_VMAX_W_U_VV, match_opcode, 0 }, |
| {"vmax.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_W_U_VX, MASK_VMAX_W_U_VX, match_opcode, 0 }, |
| {"vmax.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_W_VV_M, MASK_VMAX_W_VV_M, match_opcode, 0 }, |
| {"vmax.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_W_VX_M, MASK_VMAX_W_VX_M, match_opcode, 0 }, |
| {"vmax.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMAX_W_U_VV_M, MASK_VMAX_W_U_VV_M, match_opcode, 0 }, |
| {"vmax.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMAX_W_U_VX_M, MASK_VMAX_W_U_VX_M, match_opcode, 0 }, |
| {"vmin.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_B_VV, MASK_VMIN_B_VV, match_opcode, 0 }, |
| {"vmin.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_B_VX, MASK_VMIN_B_VX, match_opcode, 0 }, |
| {"vmin.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_B_U_VV, MASK_VMIN_B_U_VV, match_opcode, 0 }, |
| {"vmin.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_B_U_VX, MASK_VMIN_B_U_VX, match_opcode, 0 }, |
| {"vmin.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_B_VV_M, MASK_VMIN_B_VV_M, match_opcode, 0 }, |
| {"vmin.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_B_VX_M, MASK_VMIN_B_VX_M, match_opcode, 0 }, |
| {"vmin.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_B_U_VV_M, MASK_VMIN_B_U_VV_M, match_opcode, 0 }, |
| {"vmin.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_B_U_VX_M, MASK_VMIN_B_U_VX_M, match_opcode, 0 }, |
| {"vmin.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_H_VV, MASK_VMIN_H_VV, match_opcode, 0 }, |
| {"vmin.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_H_VX, MASK_VMIN_H_VX, match_opcode, 0 }, |
| {"vmin.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_H_U_VV, MASK_VMIN_H_U_VV, match_opcode, 0 }, |
| {"vmin.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_H_U_VX, MASK_VMIN_H_U_VX, match_opcode, 0 }, |
| {"vmin.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_H_VV_M, MASK_VMIN_H_VV_M, match_opcode, 0 }, |
| {"vmin.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_H_VX_M, MASK_VMIN_H_VX_M, match_opcode, 0 }, |
| {"vmin.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_H_U_VV_M, MASK_VMIN_H_U_VV_M, match_opcode, 0 }, |
| {"vmin.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_H_U_VX_M, MASK_VMIN_H_U_VX_M, match_opcode, 0 }, |
| {"vmin.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_W_VV, MASK_VMIN_W_VV, match_opcode, 0 }, |
| {"vmin.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_W_VX, MASK_VMIN_W_VX, match_opcode, 0 }, |
| {"vmin.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_W_U_VV, MASK_VMIN_W_U_VV, match_opcode, 0 }, |
| {"vmin.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_W_U_VX, MASK_VMIN_W_U_VX, match_opcode, 0 }, |
| {"vmin.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_W_VV_M, MASK_VMIN_W_VV_M, match_opcode, 0 }, |
| {"vmin.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_W_VX_M, MASK_VMIN_W_VX_M, match_opcode, 0 }, |
| {"vmin.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMIN_W_U_VV_M, MASK_VMIN_W_U_VV_M, match_opcode, 0 }, |
| {"vmin.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMIN_W_U_VX_M, MASK_VMIN_W_U_VX_M, match_opcode, 0 }, |
| {"vadd3.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD3_B_VV, MASK_VADD3_B_VV, match_opcode, 0 }, |
| {"vadd3.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD3_B_VX, MASK_VADD3_B_VX, match_opcode, 0 }, |
| {"vadd3.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD3_B_VV_M, MASK_VADD3_B_VV_M, match_opcode, 0 }, |
| {"vadd3.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD3_B_VX_M, MASK_VADD3_B_VX_M, match_opcode, 0 }, |
| {"vadd3.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD3_H_VV, MASK_VADD3_H_VV, match_opcode, 0 }, |
| {"vadd3.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD3_H_VX, MASK_VADD3_H_VX, match_opcode, 0 }, |
| {"vadd3.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD3_H_VV_M, MASK_VADD3_H_VV_M, match_opcode, 0 }, |
| {"vadd3.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD3_H_VX_M, MASK_VADD3_H_VX_M, match_opcode, 0 }, |
| {"vadd3.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD3_W_VV, MASK_VADD3_W_VV, match_opcode, 0 }, |
| {"vadd3.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD3_W_VX, MASK_VADD3_W_VX, match_opcode, 0 }, |
| {"vadd3.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADD3_W_VV_M, MASK_VADD3_W_VV_M, match_opcode, 0 }, |
| {"vadd3.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADD3_W_VX_M, MASK_VADD3_W_VX_M, match_opcode, 0 }, |
| |
| // 100 Arithmetic2 |
| {"vadds.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_B_VV, MASK_VADDS_B_VV, match_opcode, 0 }, |
| {"vadds.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_B_VX, MASK_VADDS_B_VX, match_opcode, 0 }, |
| {"vadds.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_B_U_VV, MASK_VADDS_B_U_VV, match_opcode, 0 }, |
| {"vadds.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_B_U_VX, MASK_VADDS_B_U_VX, match_opcode, 0 }, |
| {"vadds.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_B_VV_M, MASK_VADDS_B_VV_M, match_opcode, 0 }, |
| {"vadds.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_B_VX_M, MASK_VADDS_B_VX_M, match_opcode, 0 }, |
| {"vadds.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_B_U_VV_M, MASK_VADDS_B_U_VV_M, match_opcode, 0 }, |
| {"vadds.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_B_U_VX_M, MASK_VADDS_B_U_VX_M, match_opcode, 0 }, |
| {"vadds.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_H_VV, MASK_VADDS_H_VV, match_opcode, 0 }, |
| {"vadds.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_H_VX, MASK_VADDS_H_VX, match_opcode, 0 }, |
| {"vadds.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_H_U_VV, MASK_VADDS_H_U_VV, match_opcode, 0 }, |
| {"vadds.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_H_U_VX, MASK_VADDS_H_U_VX, match_opcode, 0 }, |
| {"vadds.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_H_VV_M, MASK_VADDS_H_VV_M, match_opcode, 0 }, |
| {"vadds.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_H_VX_M, MASK_VADDS_H_VX_M, match_opcode, 0 }, |
| {"vadds.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_H_U_VV_M, MASK_VADDS_H_U_VV_M, match_opcode, 0 }, |
| {"vadds.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_H_U_VX_M, MASK_VADDS_H_U_VX_M, match_opcode, 0 }, |
| {"vadds.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_W_VV, MASK_VADDS_W_VV, match_opcode, 0 }, |
| {"vadds.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_W_VX, MASK_VADDS_W_VX, match_opcode, 0 }, |
| {"vadds.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_W_U_VV, MASK_VADDS_W_U_VV, match_opcode, 0 }, |
| {"vadds.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_W_U_VX, MASK_VADDS_W_U_VX, match_opcode, 0 }, |
| {"vadds.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_W_VV_M, MASK_VADDS_W_VV_M, match_opcode, 0 }, |
| {"vadds.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_W_VX_M, MASK_VADDS_W_VX_M, match_opcode, 0 }, |
| {"vadds.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDS_W_U_VV_M, MASK_VADDS_W_U_VV_M, match_opcode, 0 }, |
| {"vadds.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDS_W_U_VX_M, MASK_VADDS_W_U_VX_M, match_opcode, 0 }, |
| {"vsubs.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_B_VV, MASK_VSUBS_B_VV, match_opcode, 0 }, |
| {"vsubs.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_B_VX, MASK_VSUBS_B_VX, match_opcode, 0 }, |
| {"vsubs.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_B_U_VV, MASK_VSUBS_B_U_VV, match_opcode, 0 }, |
| {"vsubs.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_B_U_VX, MASK_VSUBS_B_U_VX, match_opcode, 0 }, |
| {"vsubs.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_B_VV_M, MASK_VSUBS_B_VV_M, match_opcode, 0 }, |
| {"vsubs.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_B_VX_M, MASK_VSUBS_B_VX_M, match_opcode, 0 }, |
| {"vsubs.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_B_U_VV_M, MASK_VSUBS_B_U_VV_M, match_opcode, 0 }, |
| {"vsubs.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_B_U_VX_M, MASK_VSUBS_B_U_VX_M, match_opcode, 0 }, |
| {"vsubs.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_H_VV, MASK_VSUBS_H_VV, match_opcode, 0 }, |
| {"vsubs.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_H_VX, MASK_VSUBS_H_VX, match_opcode, 0 }, |
| {"vsubs.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_H_U_VV, MASK_VSUBS_H_U_VV, match_opcode, 0 }, |
| {"vsubs.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_H_U_VX, MASK_VSUBS_H_U_VX, match_opcode, 0 }, |
| {"vsubs.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_H_VV_M, MASK_VSUBS_H_VV_M, match_opcode, 0 }, |
| {"vsubs.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_H_VX_M, MASK_VSUBS_H_VX_M, match_opcode, 0 }, |
| {"vsubs.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_H_U_VV_M, MASK_VSUBS_H_U_VV_M, match_opcode, 0 }, |
| {"vsubs.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_H_U_VX_M, MASK_VSUBS_H_U_VX_M, match_opcode, 0 }, |
| {"vsubs.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_W_VV, MASK_VSUBS_W_VV, match_opcode, 0 }, |
| {"vsubs.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_W_VX, MASK_VSUBS_W_VX, match_opcode, 0 }, |
| {"vsubs.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_W_U_VV, MASK_VSUBS_W_U_VV, match_opcode, 0 }, |
| {"vsubs.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_W_U_VX, MASK_VSUBS_W_U_VX, match_opcode, 0 }, |
| {"vsubs.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_W_VV_M, MASK_VSUBS_W_VV_M, match_opcode, 0 }, |
| {"vsubs.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_W_VX_M, MASK_VSUBS_W_VX_M, match_opcode, 0 }, |
| {"vsubs.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBS_W_U_VV_M, MASK_VSUBS_W_U_VV_M, match_opcode, 0 }, |
| {"vsubs.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBS_W_U_VX_M, MASK_VSUBS_W_U_VX_M, match_opcode, 0 }, |
| {"vaddw.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDW_H_VV, MASK_VADDW_H_VV, match_opcode, 0 }, |
| {"vaddw.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDW_H_VX, MASK_VADDW_H_VX, match_opcode, 0 }, |
| {"vaddw.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDW_H_U_VV, MASK_VADDW_H_U_VV, match_opcode, 0 }, |
| {"vaddw.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDW_H_U_VX, MASK_VADDW_H_U_VX, match_opcode, 0 }, |
| {"vaddw.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDW_H_VV_M, MASK_VADDW_H_VV_M, match_opcode, 0 }, |
| {"vaddw.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDW_H_VX_M, MASK_VADDW_H_VX_M, match_opcode, 0 }, |
| {"vaddw.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDW_H_U_VV_M, MASK_VADDW_H_U_VV_M, match_opcode, 0 }, |
| {"vaddw.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDW_H_U_VX_M, MASK_VADDW_H_U_VX_M, match_opcode, 0 }, |
| {"vaddw.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDW_W_VV, MASK_VADDW_W_VV, match_opcode, 0 }, |
| {"vaddw.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDW_W_VX, MASK_VADDW_W_VX, match_opcode, 0 }, |
| {"vaddw.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDW_W_U_VV, MASK_VADDW_W_U_VV, match_opcode, 0 }, |
| {"vaddw.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDW_W_U_VX, MASK_VADDW_W_U_VX, match_opcode, 0 }, |
| {"vaddw.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDW_W_VV_M, MASK_VADDW_W_VV_M, match_opcode, 0 }, |
| {"vaddw.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDW_W_VX_M, MASK_VADDW_W_VX_M, match_opcode, 0 }, |
| {"vaddw.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VADDW_W_U_VV_M, MASK_VADDW_W_U_VV_M, match_opcode, 0 }, |
| {"vaddw.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VADDW_W_U_VX_M, MASK_VADDW_W_U_VX_M, match_opcode, 0 }, |
| {"vsubw.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBW_H_VV, MASK_VSUBW_H_VV, match_opcode, 0 }, |
| {"vsubw.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBW_H_VX, MASK_VSUBW_H_VX, match_opcode, 0 }, |
| {"vsubw.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBW_H_U_VV, MASK_VSUBW_H_U_VV, match_opcode, 0 }, |
| {"vsubw.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBW_H_U_VX, MASK_VSUBW_H_U_VX, match_opcode, 0 }, |
| {"vsubw.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBW_H_VV_M, MASK_VSUBW_H_VV_M, match_opcode, 0 }, |
| {"vsubw.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBW_H_VX_M, MASK_VSUBW_H_VX_M, match_opcode, 0 }, |
| {"vsubw.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBW_H_U_VV_M, MASK_VSUBW_H_U_VV_M, match_opcode, 0 }, |
| {"vsubw.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBW_H_U_VX_M, MASK_VSUBW_H_U_VX_M, match_opcode, 0 }, |
| {"vsubw.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBW_W_VV, MASK_VSUBW_W_VV, match_opcode, 0 }, |
| {"vsubw.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBW_W_VX, MASK_VSUBW_W_VX, match_opcode, 0 }, |
| {"vsubw.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBW_W_U_VV, MASK_VSUBW_W_U_VV, match_opcode, 0 }, |
| {"vsubw.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBW_W_U_VX, MASK_VSUBW_W_U_VX, match_opcode, 0 }, |
| {"vsubw.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBW_W_VV_M, MASK_VSUBW_W_VV_M, match_opcode, 0 }, |
| {"vsubw.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBW_W_VX_M, MASK_VSUBW_W_VX_M, match_opcode, 0 }, |
| {"vsubw.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSUBW_W_U_VV_M, MASK_VSUBW_W_U_VV_M, match_opcode, 0 }, |
| {"vsubw.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSUBW_W_U_VX_M, MASK_VSUBW_W_U_VX_M, match_opcode, 0 }, |
| {"vacc.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VACC_H_VV, MASK_VACC_H_VV, match_opcode, 0 }, |
| {"vacc.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VACC_H_VX, MASK_VACC_H_VX, match_opcode, 0 }, |
| {"vacc.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VACC_H_U_VV, MASK_VACC_H_U_VV, match_opcode, 0 }, |
| {"vacc.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VACC_H_U_VX, MASK_VACC_H_U_VX, match_opcode, 0 }, |
| {"vacc.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VACC_H_VV_M, MASK_VACC_H_VV_M, match_opcode, 0 }, |
| {"vacc.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VACC_H_VX_M, MASK_VACC_H_VX_M, match_opcode, 0 }, |
| {"vacc.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VACC_H_U_VV_M, MASK_VACC_H_U_VV_M, match_opcode, 0 }, |
| {"vacc.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VACC_H_U_VX_M, MASK_VACC_H_U_VX_M, match_opcode, 0 }, |
| {"vacc.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VACC_W_VV, MASK_VACC_W_VV, match_opcode, 0 }, |
| {"vacc.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VACC_W_VX, MASK_VACC_W_VX, match_opcode, 0 }, |
| {"vacc.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VACC_W_U_VV, MASK_VACC_W_U_VV, match_opcode, 0 }, |
| {"vacc.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VACC_W_U_VX, MASK_VACC_W_U_VX, match_opcode, 0 }, |
| {"vacc.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VACC_W_VV_M, MASK_VACC_W_VV_M, match_opcode, 0 }, |
| {"vacc.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VACC_W_VX_M, MASK_VACC_W_VX_M, match_opcode, 0 }, |
| {"vacc.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VACC_W_U_VV_M, MASK_VACC_W_U_VV_M, match_opcode, 0 }, |
| {"vacc.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VACC_W_U_VX_M, MASK_VACC_W_U_VX_M, match_opcode, 0 }, |
| {"vpadd.h.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPADD_H_V, MASK_VPADD_H_V, match_opcode, 0 }, |
| {"vpadd.h.u.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPADD_H_U_V, MASK_VPADD_H_U_V, match_opcode, 0 }, |
| {"vpadd.h.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPADD_H_V_M, MASK_VPADD_H_V_M, match_opcode, 0 }, |
| {"vpadd.h.u.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPADD_H_U_V_M, MASK_VPADD_H_U_V_M, match_opcode, 0 }, |
| {"vpadd.w.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPADD_W_V, MASK_VPADD_W_V, match_opcode, 0 }, |
| {"vpadd.w.u.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPADD_W_U_V, MASK_VPADD_W_U_V, match_opcode, 0 }, |
| {"vpadd.w.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPADD_W_V_M, MASK_VPADD_W_V_M, match_opcode, 0 }, |
| {"vpadd.w.u.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPADD_W_U_V_M, MASK_VPADD_W_U_V_M, match_opcode, 0 }, |
| {"vpsub.h.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPSUB_H_V, MASK_VPSUB_H_V, match_opcode, 0 }, |
| {"vpsub.h.u.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPSUB_H_U_V, MASK_VPSUB_H_U_V, match_opcode, 0 }, |
| {"vpsub.h.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPSUB_H_V_M, MASK_VPSUB_H_V_M, match_opcode, 0 }, |
| {"vpsub.h.u.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPSUB_H_U_V_M, MASK_VPSUB_H_U_V_M, match_opcode, 0 }, |
| {"vpsub.w.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPSUB_W_V, MASK_VPSUB_W_V, match_opcode, 0 }, |
| {"vpsub.w.u.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPSUB_W_U_V, MASK_VPSUB_W_U_V, match_opcode, 0 }, |
| {"vpsub.w.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPSUB_W_V_M, MASK_VPSUB_W_V_M, match_opcode, 0 }, |
| {"vpsub.w.u.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VPSUB_W_U_V_M, MASK_VPSUB_W_U_V_M, match_opcode, 0 }, |
| {"vhadd.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_B_VV, MASK_VHADD_B_VV, match_opcode, 0 }, |
| {"vhadd.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_B_VX, MASK_VHADD_B_VX, match_opcode, 0 }, |
| {"vhadd.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_B_R_VV, MASK_VHADD_B_R_VV, match_opcode, 0 }, |
| {"vhadd.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_B_R_VX, MASK_VHADD_B_R_VX, match_opcode, 0 }, |
| {"vhadd.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_B_U_VV, MASK_VHADD_B_U_VV, match_opcode, 0 }, |
| {"vhadd.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_B_U_VX, MASK_VHADD_B_U_VX, match_opcode, 0 }, |
| {"vhadd.b.ur.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_B_UR_VV, MASK_VHADD_B_UR_VV, match_opcode, 0 }, |
| {"vhadd.b.ur.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_B_UR_VX, MASK_VHADD_B_UR_VX, match_opcode, 0 }, |
| {"vhadd.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_B_VV_M, MASK_VHADD_B_VV_M, match_opcode, 0 }, |
| {"vhadd.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_B_VX_M, MASK_VHADD_B_VX_M, match_opcode, 0 }, |
| {"vhadd.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_B_R_VV_M, MASK_VHADD_B_R_VV_M, match_opcode, 0 }, |
| {"vhadd.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_B_R_VX_M, MASK_VHADD_B_R_VX_M, match_opcode, 0 }, |
| {"vhadd.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_B_U_VV_M, MASK_VHADD_B_U_VV_M, match_opcode, 0 }, |
| {"vhadd.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_B_U_VX_M, MASK_VHADD_B_U_VX_M, match_opcode, 0 }, |
| {"vhadd.b.ur.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_B_UR_VV_M, MASK_VHADD_B_UR_VV_M, match_opcode, 0 }, |
| {"vhadd.b.ur.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_B_UR_VX_M, MASK_VHADD_B_UR_VX_M, match_opcode, 0 }, |
| {"vhadd.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_H_VV, MASK_VHADD_H_VV, match_opcode, 0 }, |
| {"vhadd.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_H_VX, MASK_VHADD_H_VX, match_opcode, 0 }, |
| {"vhadd.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_H_R_VV, MASK_VHADD_H_R_VV, match_opcode, 0 }, |
| {"vhadd.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_H_R_VX, MASK_VHADD_H_R_VX, match_opcode, 0 }, |
| {"vhadd.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_H_U_VV, MASK_VHADD_H_U_VV, match_opcode, 0 }, |
| {"vhadd.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_H_U_VX, MASK_VHADD_H_U_VX, match_opcode, 0 }, |
| {"vhadd.h.ur.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_H_UR_VV, MASK_VHADD_H_UR_VV, match_opcode, 0 }, |
| {"vhadd.h.ur.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_H_UR_VX, MASK_VHADD_H_UR_VX, match_opcode, 0 }, |
| {"vhadd.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_H_VV_M, MASK_VHADD_H_VV_M, match_opcode, 0 }, |
| {"vhadd.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_H_VX_M, MASK_VHADD_H_VX_M, match_opcode, 0 }, |
| {"vhadd.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_H_R_VV_M, MASK_VHADD_H_R_VV_M, match_opcode, 0 }, |
| {"vhadd.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_H_R_VX_M, MASK_VHADD_H_R_VX_M, match_opcode, 0 }, |
| {"vhadd.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_H_U_VV_M, MASK_VHADD_H_U_VV_M, match_opcode, 0 }, |
| {"vhadd.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_H_U_VX_M, MASK_VHADD_H_U_VX_M, match_opcode, 0 }, |
| {"vhadd.h.ur.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_H_UR_VV_M, MASK_VHADD_H_UR_VV_M, match_opcode, 0 }, |
| {"vhadd.h.ur.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_H_UR_VX_M, MASK_VHADD_H_UR_VX_M, match_opcode, 0 }, |
| {"vhadd.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_W_VV, MASK_VHADD_W_VV, match_opcode, 0 }, |
| {"vhadd.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_W_VX, MASK_VHADD_W_VX, match_opcode, 0 }, |
| {"vhadd.w.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_W_R_VV, MASK_VHADD_W_R_VV, match_opcode, 0 }, |
| {"vhadd.w.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_W_R_VX, MASK_VHADD_W_R_VX, match_opcode, 0 }, |
| {"vhadd.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_W_U_VV, MASK_VHADD_W_U_VV, match_opcode, 0 }, |
| {"vhadd.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_W_U_VX, MASK_VHADD_W_U_VX, match_opcode, 0 }, |
| {"vhadd.w.ur.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_W_UR_VV, MASK_VHADD_W_UR_VV, match_opcode, 0 }, |
| {"vhadd.w.ur.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_W_UR_VX, MASK_VHADD_W_UR_VX, match_opcode, 0 }, |
| {"vhadd.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_W_VV_M, MASK_VHADD_W_VV_M, match_opcode, 0 }, |
| {"vhadd.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_W_VX_M, MASK_VHADD_W_VX_M, match_opcode, 0 }, |
| {"vhadd.w.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_W_R_VV_M, MASK_VHADD_W_R_VV_M, match_opcode, 0 }, |
| {"vhadd.w.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_W_R_VX_M, MASK_VHADD_W_R_VX_M, match_opcode, 0 }, |
| {"vhadd.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_W_U_VV_M, MASK_VHADD_W_U_VV_M, match_opcode, 0 }, |
| {"vhadd.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_W_U_VX_M, MASK_VHADD_W_U_VX_M, match_opcode, 0 }, |
| {"vhadd.w.ur.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHADD_W_UR_VV_M, MASK_VHADD_W_UR_VV_M, match_opcode, 0 }, |
| {"vhadd.w.ur.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHADD_W_UR_VX_M, MASK_VHADD_W_UR_VX_M, match_opcode, 0 }, |
| {"vhsub.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_B_VV, MASK_VHSUB_B_VV, match_opcode, 0 }, |
| {"vhsub.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_B_VX, MASK_VHSUB_B_VX, match_opcode, 0 }, |
| {"vhsub.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_B_R_VV, MASK_VHSUB_B_R_VV, match_opcode, 0 }, |
| {"vhsub.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_B_R_VX, MASK_VHSUB_B_R_VX, match_opcode, 0 }, |
| {"vhsub.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_B_U_VV, MASK_VHSUB_B_U_VV, match_opcode, 0 }, |
| {"vhsub.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_B_U_VX, MASK_VHSUB_B_U_VX, match_opcode, 0 }, |
| {"vhsub.b.ur.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_B_UR_VV, MASK_VHSUB_B_UR_VV, match_opcode, 0 }, |
| {"vhsub.b.ur.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_B_UR_VX, MASK_VHSUB_B_UR_VX, match_opcode, 0 }, |
| {"vhsub.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_B_VV_M, MASK_VHSUB_B_VV_M, match_opcode, 0 }, |
| {"vhsub.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_B_VX_M, MASK_VHSUB_B_VX_M, match_opcode, 0 }, |
| {"vhsub.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_B_R_VV_M, MASK_VHSUB_B_R_VV_M, match_opcode, 0 }, |
| {"vhsub.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_B_R_VX_M, MASK_VHSUB_B_R_VX_M, match_opcode, 0 }, |
| {"vhsub.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_B_U_VV_M, MASK_VHSUB_B_U_VV_M, match_opcode, 0 }, |
| {"vhsub.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_B_U_VX_M, MASK_VHSUB_B_U_VX_M, match_opcode, 0 }, |
| {"vhsub.b.ur.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_B_UR_VV_M, MASK_VHSUB_B_UR_VV_M, match_opcode, 0 }, |
| {"vhsub.b.ur.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_B_UR_VX_M, MASK_VHSUB_B_UR_VX_M, match_opcode, 0 }, |
| {"vhsub.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_H_VV, MASK_VHSUB_H_VV, match_opcode, 0 }, |
| {"vhsub.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_H_VX, MASK_VHSUB_H_VX, match_opcode, 0 }, |
| {"vhsub.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_H_R_VV, MASK_VHSUB_H_R_VV, match_opcode, 0 }, |
| {"vhsub.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_H_R_VX, MASK_VHSUB_H_R_VX, match_opcode, 0 }, |
| {"vhsub.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_H_U_VV, MASK_VHSUB_H_U_VV, match_opcode, 0 }, |
| {"vhsub.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_H_U_VX, MASK_VHSUB_H_U_VX, match_opcode, 0 }, |
| {"vhsub.h.ur.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_H_UR_VV, MASK_VHSUB_H_UR_VV, match_opcode, 0 }, |
| {"vhsub.h.ur.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_H_UR_VX, MASK_VHSUB_H_UR_VX, match_opcode, 0 }, |
| {"vhsub.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_H_VV_M, MASK_VHSUB_H_VV_M, match_opcode, 0 }, |
| {"vhsub.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_H_VX_M, MASK_VHSUB_H_VX_M, match_opcode, 0 }, |
| {"vhsub.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_H_R_VV_M, MASK_VHSUB_H_R_VV_M, match_opcode, 0 }, |
| {"vhsub.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_H_R_VX_M, MASK_VHSUB_H_R_VX_M, match_opcode, 0 }, |
| {"vhsub.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_H_U_VV_M, MASK_VHSUB_H_U_VV_M, match_opcode, 0 }, |
| {"vhsub.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_H_U_VX_M, MASK_VHSUB_H_U_VX_M, match_opcode, 0 }, |
| {"vhsub.h.ur.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_H_UR_VV_M, MASK_VHSUB_H_UR_VV_M, match_opcode, 0 }, |
| {"vhsub.h.ur.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_H_UR_VX_M, MASK_VHSUB_H_UR_VX_M, match_opcode, 0 }, |
| {"vhsub.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_W_VV, MASK_VHSUB_W_VV, match_opcode, 0 }, |
| {"vhsub.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_W_VX, MASK_VHSUB_W_VX, match_opcode, 0 }, |
| {"vhsub.w.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_W_R_VV, MASK_VHSUB_W_R_VV, match_opcode, 0 }, |
| {"vhsub.w.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_W_R_VX, MASK_VHSUB_W_R_VX, match_opcode, 0 }, |
| {"vhsub.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_W_U_VV, MASK_VHSUB_W_U_VV, match_opcode, 0 }, |
| {"vhsub.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_W_U_VX, MASK_VHSUB_W_U_VX, match_opcode, 0 }, |
| {"vhsub.w.ur.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_W_UR_VV, MASK_VHSUB_W_UR_VV, match_opcode, 0 }, |
| {"vhsub.w.ur.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_W_UR_VX, MASK_VHSUB_W_UR_VX, match_opcode, 0 }, |
| {"vhsub.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_W_VV_M, MASK_VHSUB_W_VV_M, match_opcode, 0 }, |
| {"vhsub.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_W_VX_M, MASK_VHSUB_W_VX_M, match_opcode, 0 }, |
| {"vhsub.w.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_W_R_VV_M, MASK_VHSUB_W_R_VV_M, match_opcode, 0 }, |
| {"vhsub.w.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_W_R_VX_M, MASK_VHSUB_W_R_VX_M, match_opcode, 0 }, |
| {"vhsub.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_W_U_VV_M, MASK_VHSUB_W_U_VV_M, match_opcode, 0 }, |
| {"vhsub.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_W_U_VX_M, MASK_VHSUB_W_U_VX_M, match_opcode, 0 }, |
| {"vhsub.w.ur.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VHSUB_W_UR_VV_M, MASK_VHSUB_W_UR_VV_M, match_opcode, 0 }, |
| {"vhsub.w.ur.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VHSUB_W_UR_VX_M, MASK_VHSUB_W_UR_VX_M, match_opcode, 0 }, |
| |
| // 001 Logical |
| {"vand.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VAND_VV, MASK_VAND_VV, match_opcode, 0 }, |
| {"vand.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VAND_B_VX, MASK_VAND_B_VX, match_opcode, 0 }, |
| {"vand.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VAND_VV_M, MASK_VAND_VV_M, match_opcode, 0 }, |
| {"vand.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VAND_B_VX_M, MASK_VAND_B_VX_M, match_opcode, 0 }, |
| {"vand.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VAND_H_VX, MASK_VAND_H_VX, match_opcode, 0 }, |
| {"vand.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VAND_H_VX_M, MASK_VAND_H_VX_M, match_opcode, 0 }, |
| {"vand.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VAND_W_VX, MASK_VAND_W_VX, match_opcode, 0 }, |
| {"vand.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VAND_W_VX_M, MASK_VAND_W_VX_M, match_opcode, 0 }, |
| {"vor.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VOR_VV, MASK_VOR_VV, match_opcode, 0 }, |
| {"vor.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VOR_B_VX, MASK_VOR_B_VX, match_opcode, 0 }, |
| {"vor.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VOR_VV_M, MASK_VOR_VV_M, match_opcode, 0 }, |
| {"vor.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VOR_B_VX_M, MASK_VOR_B_VX_M, match_opcode, 0 }, |
| {"vor.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VOR_H_VX, MASK_VOR_H_VX, match_opcode, 0 }, |
| {"vor.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VOR_H_VX_M, MASK_VOR_H_VX_M, match_opcode, 0 }, |
| {"vor.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VOR_W_VX, MASK_VOR_W_VX, match_opcode, 0 }, |
| {"vor.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VOR_W_VX_M, MASK_VOR_W_VX_M, match_opcode, 0 }, |
| {"vxor.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VXOR_VV, MASK_VXOR_VV, match_opcode, 0 }, |
| {"vxor.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VXOR_B_VX, MASK_VXOR_B_VX, match_opcode, 0 }, |
| {"vxor.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VXOR_VV_M, MASK_VXOR_VV_M, match_opcode, 0 }, |
| {"vxor.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VXOR_B_VX_M, MASK_VXOR_B_VX_M, match_opcode, 0 }, |
| {"vxor.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VXOR_H_VX, MASK_VXOR_H_VX, match_opcode, 0 }, |
| {"vxor.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VXOR_H_VX_M, MASK_VXOR_H_VX_M, match_opcode, 0 }, |
| {"vxor.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VXOR_W_VX, MASK_VXOR_W_VX, match_opcode, 0 }, |
| {"vxor.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VXOR_W_VX_M, MASK_VXOR_W_VX_M, match_opcode, 0 }, |
| {"vnot.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VNOT_V, MASK_VNOT_V, match_opcode, 0 }, |
| {"vnot.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VNOT_V_M, MASK_VNOT_V_M, match_opcode, 0 }, |
| {"vrev.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VREV_B_VV, MASK_VREV_B_VV, match_opcode, 0 }, |
| {"vrev.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VREV_B_VX, MASK_VREV_B_VX, match_opcode, 0 }, |
| {"vrev.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VREV_B_VV_M, MASK_VREV_B_VV_M, match_opcode, 0 }, |
| {"vrev.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VREV_B_VX_M, MASK_VREV_B_VX_M, match_opcode, 0 }, |
| {"vrev.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VREV_H_VV, MASK_VREV_H_VV, match_opcode, 0 }, |
| {"vrev.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VREV_H_VX, MASK_VREV_H_VX, match_opcode, 0 }, |
| {"vrev.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VREV_H_VV_M, MASK_VREV_H_VV_M, match_opcode, 0 }, |
| {"vrev.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VREV_H_VX_M, MASK_VREV_H_VX_M, match_opcode, 0 }, |
| {"vrev.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VREV_W_VV, MASK_VREV_W_VV, match_opcode, 0 }, |
| {"vrev.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VREV_W_VX, MASK_VREV_W_VX, match_opcode, 0 }, |
| {"vrev.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VREV_W_VV_M, MASK_VREV_W_VV_M, match_opcode, 0 }, |
| {"vrev.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VREV_W_VX_M, MASK_VREV_W_VX_M, match_opcode, 0 }, |
| {"vror.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VROR_B_VV, MASK_VROR_B_VV, match_opcode, 0 }, |
| {"vror.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VROR_B_VX, MASK_VROR_B_VX, match_opcode, 0 }, |
| {"vror.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VROR_B_VV_M, MASK_VROR_B_VV_M, match_opcode, 0 }, |
| {"vror.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VROR_B_VX_M, MASK_VROR_B_VX_M, match_opcode, 0 }, |
| {"vror.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VROR_H_VV, MASK_VROR_H_VV, match_opcode, 0 }, |
| {"vror.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VROR_H_VX, MASK_VROR_H_VX, match_opcode, 0 }, |
| {"vror.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VROR_H_VV_M, MASK_VROR_H_VV_M, match_opcode, 0 }, |
| {"vror.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VROR_H_VX_M, MASK_VROR_H_VX_M, match_opcode, 0 }, |
| {"vror.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VROR_W_VV, MASK_VROR_W_VV, match_opcode, 0 }, |
| {"vror.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VROR_W_VX, MASK_VROR_W_VX, match_opcode, 0 }, |
| {"vror.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VROR_W_VV_M, MASK_VROR_W_VV_M, match_opcode, 0 }, |
| {"vror.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VROR_W_VX_M, MASK_VROR_W_VX_M, match_opcode, 0 }, |
| {"vclb.b.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLB_B_V, MASK_VCLB_B_V, match_opcode, 0 }, |
| {"vclb.b.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLB_B_V_M, MASK_VCLB_B_V_M, match_opcode, 0 }, |
| {"vclb.h.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLB_H_V, MASK_VCLB_H_V, match_opcode, 0 }, |
| {"vclb.h.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLB_H_V_M, MASK_VCLB_H_V_M, match_opcode, 0 }, |
| {"vclb.w.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLB_W_V, MASK_VCLB_W_V, match_opcode, 0 }, |
| {"vclb.w.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLB_W_V_M, MASK_VCLB_W_V_M, match_opcode, 0 }, |
| {"vclz.b.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLZ_B_V, MASK_VCLZ_B_V, match_opcode, 0 }, |
| {"vclz.b.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLZ_B_V_M, MASK_VCLZ_B_V_M, match_opcode, 0 }, |
| {"vclz.h.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLZ_H_V, MASK_VCLZ_H_V, match_opcode, 0 }, |
| {"vclz.h.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLZ_H_V_M, MASK_VCLZ_H_V_M, match_opcode, 0 }, |
| {"vclz.w.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLZ_W_V, MASK_VCLZ_W_V, match_opcode, 0 }, |
| {"vclz.w.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCLZ_W_V_M, MASK_VCLZ_W_V_M, match_opcode, 0 }, |
| {"vcpop.b.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCPOP_B_V, MASK_VCPOP_B_V, match_opcode, 0 }, |
| {"vcpop.b.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCPOP_B_V_M, MASK_VCPOP_B_V_M, match_opcode, 0 }, |
| {"vcpop.h.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCPOP_H_V, MASK_VCPOP_H_V, match_opcode, 0 }, |
| {"vcpop.h.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCPOP_H_V_M, MASK_VCPOP_H_V_M, match_opcode, 0 }, |
| {"vcpop.w.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCPOP_W_V, MASK_VCPOP_W_V, match_opcode, 0 }, |
| {"vcpop.w.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VCPOP_W_V_M, MASK_VCPOP_W_V_M, match_opcode, 0 }, |
| {"vmv.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VMV_V, MASK_VMV_V, match_opcode, 0 }, |
| {"vmv.v.m", 0, INSN_CLASS_K, "Vd,Vs", MATCH_VMV_V_M, MASK_VMV_V_M, match_opcode, 0 }, |
| {"vmvp.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMVP_VV, MASK_VMVP_VV, match_opcode, 0 }, |
| {"vmvp.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMVP_B_VX, MASK_VMVP_B_VX, match_opcode, 0 }, |
| {"vmvp.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMVP_VV_M, MASK_VMVP_VV_M, match_opcode, 0 }, |
| {"vmvp.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMVP_B_VX_M, MASK_VMVP_B_VX_M, match_opcode, 0 }, |
| {"vmvp.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMVP_H_VX, MASK_VMVP_H_VX, match_opcode, 0 }, |
| {"vmvp.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMVP_H_VX_M, MASK_VMVP_H_VX_M, match_opcode, 0 }, |
| {"vmvp.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMVP_W_VX, MASK_VMVP_W_VX, match_opcode, 0 }, |
| {"vmvp.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMVP_W_VX_M, MASK_VMVP_W_VX_M, match_opcode, 0 }, |
| {"acset.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_ACSET_V, MASK_ACSET_V, match_opcode, 0 }, |
| {"actr.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_ACTR_V, MASK_ACTR_V, match_opcode, 0 }, |
| {"adwinit.v", 0, INSN_CLASS_K, "Vd,Vs", MATCH_ADWINIT_V, MASK_ADWINIT_V, match_opcode, 0 }, |
| |
| // 010 Shift |
| {"vsll.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLL_B_VV, MASK_VSLL_B_VV, match_opcode, 0 }, |
| {"vsll.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLL_B_VX, MASK_VSLL_B_VX, match_opcode, 0 }, |
| {"vsll.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLL_B_VV_M, MASK_VSLL_B_VV_M, match_opcode, 0 }, |
| {"vsll.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLL_B_VX_M, MASK_VSLL_B_VX_M, match_opcode, 0 }, |
| {"vsll.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLL_H_VV, MASK_VSLL_H_VV, match_opcode, 0 }, |
| {"vsll.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLL_H_VX, MASK_VSLL_H_VX, match_opcode, 0 }, |
| {"vsll.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLL_H_VV_M, MASK_VSLL_H_VV_M, match_opcode, 0 }, |
| {"vsll.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLL_H_VX_M, MASK_VSLL_H_VX_M, match_opcode, 0 }, |
| {"vsll.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLL_W_VV, MASK_VSLL_W_VV, match_opcode, 0 }, |
| {"vsll.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLL_W_VX, MASK_VSLL_W_VX, match_opcode, 0 }, |
| {"vsll.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLL_W_VV_M, MASK_VSLL_W_VV_M, match_opcode, 0 }, |
| {"vsll.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLL_W_VX_M, MASK_VSLL_W_VX_M, match_opcode, 0 }, |
| {"vsra.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRA_B_VV, MASK_VSRA_B_VV, match_opcode, 0 }, |
| {"vsra.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRA_B_VX, MASK_VSRA_B_VX, match_opcode, 0 }, |
| {"vsra.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRA_B_VV_M, MASK_VSRA_B_VV_M, match_opcode, 0 }, |
| {"vsra.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRA_B_VX_M, MASK_VSRA_B_VX_M, match_opcode, 0 }, |
| {"vsra.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRA_H_VV, MASK_VSRA_H_VV, match_opcode, 0 }, |
| {"vsra.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRA_H_VX, MASK_VSRA_H_VX, match_opcode, 0 }, |
| {"vsra.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRA_H_VV_M, MASK_VSRA_H_VV_M, match_opcode, 0 }, |
| {"vsra.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRA_H_VX_M, MASK_VSRA_H_VX_M, match_opcode, 0 }, |
| {"vsra.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRA_W_VV, MASK_VSRA_W_VV, match_opcode, 0 }, |
| {"vsra.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRA_W_VX, MASK_VSRA_W_VX, match_opcode, 0 }, |
| {"vsra.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRA_W_VV_M, MASK_VSRA_W_VV_M, match_opcode, 0 }, |
| {"vsra.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRA_W_VX_M, MASK_VSRA_W_VX_M, match_opcode, 0 }, |
| {"vsrl.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRL_B_VV, MASK_VSRL_B_VV, match_opcode, 0 }, |
| {"vsrl.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRL_B_VX, MASK_VSRL_B_VX, match_opcode, 0 }, |
| {"vsrl.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRL_B_VV_M, MASK_VSRL_B_VV_M, match_opcode, 0 }, |
| {"vsrl.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRL_B_VX_M, MASK_VSRL_B_VX_M, match_opcode, 0 }, |
| {"vsrl.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRL_H_VV, MASK_VSRL_H_VV, match_opcode, 0 }, |
| {"vsrl.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRL_H_VX, MASK_VSRL_H_VX, match_opcode, 0 }, |
| {"vsrl.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRL_H_VV_M, MASK_VSRL_H_VV_M, match_opcode, 0 }, |
| {"vsrl.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRL_H_VX_M, MASK_VSRL_H_VX_M, match_opcode, 0 }, |
| {"vsrl.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRL_W_VV, MASK_VSRL_W_VV, match_opcode, 0 }, |
| {"vsrl.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRL_W_VX, MASK_VSRL_W_VX, match_opcode, 0 }, |
| {"vsrl.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRL_W_VV_M, MASK_VSRL_W_VV_M, match_opcode, 0 }, |
| {"vsrl.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRL_W_VX_M, MASK_VSRL_W_VX_M, match_opcode, 0 }, |
| {"vsha.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_B_VV, MASK_VSHA_B_VV, match_opcode, 0 }, |
| {"vsha.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_B_VX, MASK_VSHA_B_VX, match_opcode, 0 }, |
| {"vsha.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_B_R_VV, MASK_VSHA_B_R_VV, match_opcode, 0 }, |
| {"vsha.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_B_R_VX, MASK_VSHA_B_R_VX, match_opcode, 0 }, |
| {"vsha.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_B_VV_M, MASK_VSHA_B_VV_M, match_opcode, 0 }, |
| {"vsha.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_B_VX_M, MASK_VSHA_B_VX_M, match_opcode, 0 }, |
| {"vsha.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_B_R_VV_M, MASK_VSHA_B_R_VV_M, match_opcode, 0 }, |
| {"vsha.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_B_R_VX_M, MASK_VSHA_B_R_VX_M, match_opcode, 0 }, |
| {"vsha.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_H_VV, MASK_VSHA_H_VV, match_opcode, 0 }, |
| {"vsha.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_H_VX, MASK_VSHA_H_VX, match_opcode, 0 }, |
| {"vsha.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_H_R_VV, MASK_VSHA_H_R_VV, match_opcode, 0 }, |
| {"vsha.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_H_R_VX, MASK_VSHA_H_R_VX, match_opcode, 0 }, |
| {"vsha.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_H_VV_M, MASK_VSHA_H_VV_M, match_opcode, 0 }, |
| {"vsha.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_H_VX_M, MASK_VSHA_H_VX_M, match_opcode, 0 }, |
| {"vsha.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_H_R_VV_M, MASK_VSHA_H_R_VV_M, match_opcode, 0 }, |
| {"vsha.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_H_R_VX_M, MASK_VSHA_H_R_VX_M, match_opcode, 0 }, |
| {"vsha.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_W_VV, MASK_VSHA_W_VV, match_opcode, 0 }, |
| {"vsha.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_W_VX, MASK_VSHA_W_VX, match_opcode, 0 }, |
| {"vsha.w.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_W_R_VV, MASK_VSHA_W_R_VV, match_opcode, 0 }, |
| {"vsha.w.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_W_R_VX, MASK_VSHA_W_R_VX, match_opcode, 0 }, |
| {"vsha.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_W_VV_M, MASK_VSHA_W_VV_M, match_opcode, 0 }, |
| {"vsha.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_W_VX_M, MASK_VSHA_W_VX_M, match_opcode, 0 }, |
| {"vsha.w.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHA_W_R_VV_M, MASK_VSHA_W_R_VV_M, match_opcode, 0 }, |
| {"vsha.w.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHA_W_R_VX_M, MASK_VSHA_W_R_VX_M, match_opcode, 0 }, |
| {"vshl.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_B_VV, MASK_VSHL_B_VV, match_opcode, 0 }, |
| {"vshl.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_B_VX, MASK_VSHL_B_VX, match_opcode, 0 }, |
| {"vshl.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_B_R_VV, MASK_VSHL_B_R_VV, match_opcode, 0 }, |
| {"vshl.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_B_R_VX, MASK_VSHL_B_R_VX, match_opcode, 0 }, |
| {"vshl.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_B_VV_M, MASK_VSHL_B_VV_M, match_opcode, 0 }, |
| {"vshl.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_B_VX_M, MASK_VSHL_B_VX_M, match_opcode, 0 }, |
| {"vshl.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_B_R_VV_M, MASK_VSHL_B_R_VV_M, match_opcode, 0 }, |
| {"vshl.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_B_R_VX_M, MASK_VSHL_B_R_VX_M, match_opcode, 0 }, |
| {"vshl.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_H_VV, MASK_VSHL_H_VV, match_opcode, 0 }, |
| {"vshl.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_H_VX, MASK_VSHL_H_VX, match_opcode, 0 }, |
| {"vshl.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_H_R_VV, MASK_VSHL_H_R_VV, match_opcode, 0 }, |
| {"vshl.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_H_R_VX, MASK_VSHL_H_R_VX, match_opcode, 0 }, |
| {"vshl.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_H_VV_M, MASK_VSHL_H_VV_M, match_opcode, 0 }, |
| {"vshl.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_H_VX_M, MASK_VSHL_H_VX_M, match_opcode, 0 }, |
| {"vshl.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_H_R_VV_M, MASK_VSHL_H_R_VV_M, match_opcode, 0 }, |
| {"vshl.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_H_R_VX_M, MASK_VSHL_H_R_VX_M, match_opcode, 0 }, |
| {"vshl.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_W_VV, MASK_VSHL_W_VV, match_opcode, 0 }, |
| {"vshl.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_W_VX, MASK_VSHL_W_VX, match_opcode, 0 }, |
| {"vshl.w.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_W_R_VV, MASK_VSHL_W_R_VV, match_opcode, 0 }, |
| {"vshl.w.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_W_R_VX, MASK_VSHL_W_R_VX, match_opcode, 0 }, |
| {"vshl.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_W_VV_M, MASK_VSHL_W_VV_M, match_opcode, 0 }, |
| {"vshl.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_W_VX_M, MASK_VSHL_W_VX_M, match_opcode, 0 }, |
| {"vshl.w.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSHL_W_R_VV_M, MASK_VSHL_W_R_VV_M, match_opcode, 0 }, |
| {"vshl.w.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSHL_W_R_VX_M, MASK_VSHL_W_R_VX_M, match_opcode, 0 }, |
| {"vsrans.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANS_B_VV, MASK_VSRANS_B_VV, match_opcode, 0 }, |
| {"vsrans.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANS_B_VX, MASK_VSRANS_B_VX, match_opcode, 0 }, |
| {"vsrans.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANS_B_R_VV, MASK_VSRANS_B_R_VV, match_opcode, 0 }, |
| {"vsrans.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANS_B_R_VX, MASK_VSRANS_B_R_VX, match_opcode, 0 }, |
| {"vsrans.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANS_B_VV_M, MASK_VSRANS_B_VV_M, match_opcode, 0 }, |
| {"vsrans.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANS_B_VX_M, MASK_VSRANS_B_VX_M, match_opcode, 0 }, |
| {"vsrans.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANS_B_R_VV_M, MASK_VSRANS_B_R_VV_M, match_opcode, 0 }, |
| {"vsrans.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANS_B_R_VX_M, MASK_VSRANS_B_R_VX_M, match_opcode, 0 }, |
| {"vsrans.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANS_H_VV, MASK_VSRANS_H_VV, match_opcode, 0 }, |
| {"vsrans.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANS_H_VX, MASK_VSRANS_H_VX, match_opcode, 0 }, |
| {"vsrans.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANS_H_R_VV, MASK_VSRANS_H_R_VV, match_opcode, 0 }, |
| {"vsrans.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANS_H_R_VX, MASK_VSRANS_H_R_VX, match_opcode, 0 }, |
| {"vsrans.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANS_H_VV_M, MASK_VSRANS_H_VV_M, match_opcode, 0 }, |
| {"vsrans.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANS_H_VX_M, MASK_VSRANS_H_VX_M, match_opcode, 0 }, |
| {"vsrans.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANS_H_R_VV_M, MASK_VSRANS_H_R_VV_M, match_opcode, 0 }, |
| {"vsrans.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANS_H_R_VX_M, MASK_VSRANS_H_R_VX_M, match_opcode, 0 }, |
| {"vsransu.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANSU_B_VV, MASK_VSRANSU_B_VV, match_opcode, 0 }, |
| {"vsransu.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANSU_B_VX, MASK_VSRANSU_B_VX, match_opcode, 0 }, |
| {"vsransu.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANSU_B_R_VV, MASK_VSRANSU_B_R_VV, match_opcode, 0 }, |
| {"vsransu.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANSU_B_R_VX, MASK_VSRANSU_B_R_VX, match_opcode, 0 }, |
| {"vsransu.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANSU_B_VV_M, MASK_VSRANSU_B_VV_M, match_opcode, 0 }, |
| {"vsransu.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANSU_B_VX_M, MASK_VSRANSU_B_VX_M, match_opcode, 0 }, |
| {"vsransu.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANSU_B_R_VV_M, MASK_VSRANSU_B_R_VV_M, match_opcode, 0 }, |
| {"vsransu.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANSU_B_R_VX_M, MASK_VSRANSU_B_R_VX_M, match_opcode, 0 }, |
| {"vsransu.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANSU_H_VV, MASK_VSRANSU_H_VV, match_opcode, 0 }, |
| {"vsransu.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANSU_H_VX, MASK_VSRANSU_H_VX, match_opcode, 0 }, |
| {"vsransu.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANSU_H_R_VV, MASK_VSRANSU_H_R_VV, match_opcode, 0 }, |
| {"vsransu.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANSU_H_R_VX, MASK_VSRANSU_H_R_VX, match_opcode, 0 }, |
| {"vsransu.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANSU_H_VV_M, MASK_VSRANSU_H_VV_M, match_opcode, 0 }, |
| {"vsransu.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANSU_H_VX_M, MASK_VSRANSU_H_VX_M, match_opcode, 0 }, |
| {"vsransu.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRANSU_H_R_VV_M, MASK_VSRANSU_H_R_VV_M, match_opcode, 0 }, |
| {"vsransu.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRANSU_H_R_VX_M, MASK_VSRANSU_H_R_VX_M, match_opcode, 0 }, |
| {"vsraqs.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRAQS_B_VV, MASK_VSRAQS_B_VV, match_opcode, 0 }, |
| {"vsraqs.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRAQS_B_VX, MASK_VSRAQS_B_VX, match_opcode, 0 }, |
| {"vsraqs.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRAQS_B_R_VV, MASK_VSRAQS_B_R_VV, match_opcode, 0 }, |
| {"vsraqs.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRAQS_B_R_VX, MASK_VSRAQS_B_R_VX, match_opcode, 0 }, |
| {"vsraqs.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRAQS_B_VV_M, MASK_VSRAQS_B_VV_M, match_opcode, 0 }, |
| {"vsraqs.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRAQS_B_VX_M, MASK_VSRAQS_B_VX_M, match_opcode, 0 }, |
| {"vsraqs.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRAQS_B_R_VV_M, MASK_VSRAQS_B_R_VV_M, match_opcode, 0 }, |
| {"vsraqs.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRAQS_B_R_VX_M, MASK_VSRAQS_B_R_VX_M, match_opcode, 0 }, |
| {"vsraqsu.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRAQSU_B_VV, MASK_VSRAQSU_B_VV, match_opcode, 0 }, |
| {"vsraqsu.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRAQSU_B_VX, MASK_VSRAQSU_B_VX, match_opcode, 0 }, |
| {"vsraqsu.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRAQSU_B_R_VV, MASK_VSRAQSU_B_R_VV, match_opcode, 0 }, |
| {"vsraqsu.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRAQSU_B_R_VX, MASK_VSRAQSU_B_R_VX, match_opcode, 0 }, |
| {"vsraqsu.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRAQSU_B_VV_M, MASK_VSRAQSU_B_VV_M, match_opcode, 0 }, |
| {"vsraqsu.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRAQSU_B_VX_M, MASK_VSRAQSU_B_VX_M, match_opcode, 0 }, |
| {"vsraqsu.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSRAQSU_B_R_VV_M, MASK_VSRAQSU_B_R_VV_M, match_opcode, 0 }, |
| {"vsraqsu.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSRAQSU_B_R_VX_M, MASK_VSRAQSU_B_R_VX_M, match_opcode, 0 }, |
| |
| // 011 Mul/Div |
| {"vmul.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMUL_B_VV, MASK_VMUL_B_VV, match_opcode, 0 }, |
| {"vmul.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMUL_B_VX, MASK_VMUL_B_VX, match_opcode, 0 }, |
| {"vmul.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMUL_B_VV_M, MASK_VMUL_B_VV_M, match_opcode, 0 }, |
| {"vmul.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMUL_B_VX_M, MASK_VMUL_B_VX_M, match_opcode, 0 }, |
| {"vmul.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMUL_H_VV, MASK_VMUL_H_VV, match_opcode, 0 }, |
| {"vmul.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMUL_H_VX, MASK_VMUL_H_VX, match_opcode, 0 }, |
| {"vmul.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMUL_H_VV_M, MASK_VMUL_H_VV_M, match_opcode, 0 }, |
| {"vmul.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMUL_H_VX_M, MASK_VMUL_H_VX_M, match_opcode, 0 }, |
| {"vmul.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMUL_W_VV, MASK_VMUL_W_VV, match_opcode, 0 }, |
| {"vmul.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMUL_W_VX, MASK_VMUL_W_VX, match_opcode, 0 }, |
| {"vmul.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMUL_W_VV_M, MASK_VMUL_W_VV_M, match_opcode, 0 }, |
| {"vmul.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMUL_W_VX_M, MASK_VMUL_W_VX_M, match_opcode, 0 }, |
| {"vmuls.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_B_VV, MASK_VMULS_B_VV, match_opcode, 0 }, |
| {"vmuls.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_B_VX, MASK_VMULS_B_VX, match_opcode, 0 }, |
| {"vmuls.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_B_U_VV, MASK_VMULS_B_U_VV, match_opcode, 0 }, |
| {"vmuls.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_B_U_VX, MASK_VMULS_B_U_VX, match_opcode, 0 }, |
| {"vmuls.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_B_VV_M, MASK_VMULS_B_VV_M, match_opcode, 0 }, |
| {"vmuls.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_B_VX_M, MASK_VMULS_B_VX_M, match_opcode, 0 }, |
| {"vmuls.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_B_U_VV_M, MASK_VMULS_B_U_VV_M, match_opcode, 0 }, |
| {"vmuls.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_B_U_VX_M, MASK_VMULS_B_U_VX_M, match_opcode, 0 }, |
| {"vmuls.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_H_VV, MASK_VMULS_H_VV, match_opcode, 0 }, |
| {"vmuls.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_H_VX, MASK_VMULS_H_VX, match_opcode, 0 }, |
| {"vmuls.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_H_U_VV, MASK_VMULS_H_U_VV, match_opcode, 0 }, |
| {"vmuls.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_H_U_VX, MASK_VMULS_H_U_VX, match_opcode, 0 }, |
| {"vmuls.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_H_VV_M, MASK_VMULS_H_VV_M, match_opcode, 0 }, |
| {"vmuls.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_H_VX_M, MASK_VMULS_H_VX_M, match_opcode, 0 }, |
| {"vmuls.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_H_U_VV_M, MASK_VMULS_H_U_VV_M, match_opcode, 0 }, |
| {"vmuls.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_H_U_VX_M, MASK_VMULS_H_U_VX_M, match_opcode, 0 }, |
| {"vmuls.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_W_VV, MASK_VMULS_W_VV, match_opcode, 0 }, |
| {"vmuls.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_W_VX, MASK_VMULS_W_VX, match_opcode, 0 }, |
| {"vmuls.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_W_U_VV, MASK_VMULS_W_U_VV, match_opcode, 0 }, |
| {"vmuls.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_W_U_VX, MASK_VMULS_W_U_VX, match_opcode, 0 }, |
| {"vmuls.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_W_VV_M, MASK_VMULS_W_VV_M, match_opcode, 0 }, |
| {"vmuls.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_W_VX_M, MASK_VMULS_W_VX_M, match_opcode, 0 }, |
| {"vmuls.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULS_W_U_VV_M, MASK_VMULS_W_U_VV_M, match_opcode, 0 }, |
| {"vmuls.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULS_W_U_VX_M, MASK_VMULS_W_U_VX_M, match_opcode, 0 }, |
| {"vmulw.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_B_VV, MASK_VMULW_B_VV, match_opcode, 0 }, |
| {"vmulw.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_B_VX, MASK_VMULW_B_VX, match_opcode, 0 }, |
| {"vmulw.b.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_B_U_VV, MASK_VMULW_B_U_VV, match_opcode, 0 }, |
| {"vmulw.b.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_B_U_VX, MASK_VMULW_B_U_VX, match_opcode, 0 }, |
| {"vmulw.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_B_VV_M, MASK_VMULW_B_VV_M, match_opcode, 0 }, |
| {"vmulw.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_B_VX_M, MASK_VMULW_B_VX_M, match_opcode, 0 }, |
| {"vmulw.b.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_B_U_VV_M, MASK_VMULW_B_U_VV_M, match_opcode, 0 }, |
| {"vmulw.b.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_B_U_VX_M, MASK_VMULW_B_U_VX_M, match_opcode, 0 }, |
| {"vmulw.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_H_VV, MASK_VMULW_H_VV, match_opcode, 0 }, |
| {"vmulw.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_H_VX, MASK_VMULW_H_VX, match_opcode, 0 }, |
| {"vmulw.h.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_H_U_VV, MASK_VMULW_H_U_VV, match_opcode, 0 }, |
| {"vmulw.h.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_H_U_VX, MASK_VMULW_H_U_VX, match_opcode, 0 }, |
| {"vmulw.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_H_VV_M, MASK_VMULW_H_VV_M, match_opcode, 0 }, |
| {"vmulw.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_H_VX_M, MASK_VMULW_H_VX_M, match_opcode, 0 }, |
| {"vmulw.h.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_H_U_VV_M, MASK_VMULW_H_U_VV_M, match_opcode, 0 }, |
| {"vmulw.h.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_H_U_VX_M, MASK_VMULW_H_U_VX_M, match_opcode, 0 }, |
| {"vmulw.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_W_VV, MASK_VMULW_W_VV, match_opcode, 0 }, |
| {"vmulw.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_W_VX, MASK_VMULW_W_VX, match_opcode, 0 }, |
| {"vmulw.w.u.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_W_U_VV, MASK_VMULW_W_U_VV, match_opcode, 0 }, |
| {"vmulw.w.u.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_W_U_VX, MASK_VMULW_W_U_VX, match_opcode, 0 }, |
| {"vmulw.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_W_VV_M, MASK_VMULW_W_VV_M, match_opcode, 0 }, |
| {"vmulw.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_W_VX_M, MASK_VMULW_W_VX_M, match_opcode, 0 }, |
| {"vmulw.w.u.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULW_W_U_VV_M, MASK_VMULW_W_U_VV_M, match_opcode, 0 }, |
| {"vmulw.w.u.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULW_W_U_VX_M, MASK_VMULW_W_U_VX_M, match_opcode, 0 }, |
| {"vmulh.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_B_VV, MASK_VMULH_B_VV, match_opcode, 0 }, |
| {"vmulh.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_B_VX, MASK_VMULH_B_VX, match_opcode, 0 }, |
| {"vmulh.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_B_R_VV, MASK_VMULH_B_R_VV, match_opcode, 0 }, |
| {"vmulh.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_B_R_VX, MASK_VMULH_B_R_VX, match_opcode, 0 }, |
| {"vmulh.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_B_VV_M, MASK_VMULH_B_VV_M, match_opcode, 0 }, |
| {"vmulh.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_B_VX_M, MASK_VMULH_B_VX_M, match_opcode, 0 }, |
| {"vmulh.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_B_R_VV_M, MASK_VMULH_B_R_VV_M, match_opcode, 0 }, |
| {"vmulh.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_B_R_VX_M, MASK_VMULH_B_R_VX_M, match_opcode, 0 }, |
| {"vmulh.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_H_VV, MASK_VMULH_H_VV, match_opcode, 0 }, |
| {"vmulh.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_H_VX, MASK_VMULH_H_VX, match_opcode, 0 }, |
| {"vmulh.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_H_R_VV, MASK_VMULH_H_R_VV, match_opcode, 0 }, |
| {"vmulh.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_H_R_VX, MASK_VMULH_H_R_VX, match_opcode, 0 }, |
| {"vmulh.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_H_VV_M, MASK_VMULH_H_VV_M, match_opcode, 0 }, |
| {"vmulh.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_H_VX_M, MASK_VMULH_H_VX_M, match_opcode, 0 }, |
| {"vmulh.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_H_R_VV_M, MASK_VMULH_H_R_VV_M, match_opcode, 0 }, |
| {"vmulh.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_H_R_VX_M, MASK_VMULH_H_R_VX_M, match_opcode, 0 }, |
| {"vmulh.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_W_VV, MASK_VMULH_W_VV, match_opcode, 0 }, |
| {"vmulh.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_W_VX, MASK_VMULH_W_VX, match_opcode, 0 }, |
| {"vmulh.w.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_W_R_VV, MASK_VMULH_W_R_VV, match_opcode, 0 }, |
| {"vmulh.w.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_W_R_VX, MASK_VMULH_W_R_VX, match_opcode, 0 }, |
| {"vmulh.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_W_VV_M, MASK_VMULH_W_VV_M, match_opcode, 0 }, |
| {"vmulh.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_W_VX_M, MASK_VMULH_W_VX_M, match_opcode, 0 }, |
| {"vmulh.w.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULH_W_R_VV_M, MASK_VMULH_W_R_VV_M, match_opcode, 0 }, |
| {"vmulh.w.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULH_W_R_VX_M, MASK_VMULH_W_R_VX_M, match_opcode, 0 }, |
| {"vmulhu.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_B_VV, MASK_VMULHU_B_VV, match_opcode, 0 }, |
| {"vmulhu.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_B_VX, MASK_VMULHU_B_VX, match_opcode, 0 }, |
| {"vmulhu.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_B_R_VV, MASK_VMULHU_B_R_VV, match_opcode, 0 }, |
| {"vmulhu.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_B_R_VX, MASK_VMULHU_B_R_VX, match_opcode, 0 }, |
| {"vmulhu.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_B_VV_M, MASK_VMULHU_B_VV_M, match_opcode, 0 }, |
| {"vmulhu.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_B_VX_M, MASK_VMULHU_B_VX_M, match_opcode, 0 }, |
| {"vmulhu.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_B_R_VV_M, MASK_VMULHU_B_R_VV_M, match_opcode, 0 }, |
| {"vmulhu.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_B_R_VX_M, MASK_VMULHU_B_R_VX_M, match_opcode, 0 }, |
| {"vmulhu.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_H_VV, MASK_VMULHU_H_VV, match_opcode, 0 }, |
| {"vmulhu.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_H_VX, MASK_VMULHU_H_VX, match_opcode, 0 }, |
| {"vmulhu.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_H_R_VV, MASK_VMULHU_H_R_VV, match_opcode, 0 }, |
| {"vmulhu.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_H_R_VX, MASK_VMULHU_H_R_VX, match_opcode, 0 }, |
| {"vmulhu.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_H_VV_M, MASK_VMULHU_H_VV_M, match_opcode, 0 }, |
| {"vmulhu.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_H_VX_M, MASK_VMULHU_H_VX_M, match_opcode, 0 }, |
| {"vmulhu.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_H_R_VV_M, MASK_VMULHU_H_R_VV_M, match_opcode, 0 }, |
| {"vmulhu.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_H_R_VX_M, MASK_VMULHU_H_R_VX_M, match_opcode, 0 }, |
| {"vmulhu.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_W_VV, MASK_VMULHU_W_VV, match_opcode, 0 }, |
| {"vmulhu.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_W_VX, MASK_VMULHU_W_VX, match_opcode, 0 }, |
| {"vmulhu.w.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_W_R_VV, MASK_VMULHU_W_R_VV, match_opcode, 0 }, |
| {"vmulhu.w.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_W_R_VX, MASK_VMULHU_W_R_VX, match_opcode, 0 }, |
| {"vmulhu.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_W_VV_M, MASK_VMULHU_W_VV_M, match_opcode, 0 }, |
| {"vmulhu.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_W_VX_M, MASK_VMULHU_W_VX_M, match_opcode, 0 }, |
| {"vmulhu.w.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMULHU_W_R_VV_M, MASK_VMULHU_W_R_VV_M, match_opcode, 0 }, |
| {"vmulhu.w.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMULHU_W_R_VX_M, MASK_VMULHU_W_R_VX_M, match_opcode, 0 }, |
| {"vdmulh.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_B_VV, MASK_VDMULH_B_VV, match_opcode, 0 }, |
| {"vdmulh.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_B_VX, MASK_VDMULH_B_VX, match_opcode, 0 }, |
| {"vdmulh.b.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_B_R_VV, MASK_VDMULH_B_R_VV, match_opcode, 0 }, |
| {"vdmulh.b.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_B_R_VX, MASK_VDMULH_B_R_VX, match_opcode, 0 }, |
| {"vdmulh.b.rn.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_B_RN_VV, MASK_VDMULH_B_RN_VV, match_opcode, 0 }, |
| {"vdmulh.b.rn.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_B_RN_VX, MASK_VDMULH_B_RN_VX, match_opcode, 0 }, |
| {"vdmulh.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_B_VV_M, MASK_VDMULH_B_VV_M, match_opcode, 0 }, |
| {"vdmulh.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_B_VX_M, MASK_VDMULH_B_VX_M, match_opcode, 0 }, |
| {"vdmulh.b.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_B_R_VV_M, MASK_VDMULH_B_R_VV_M, match_opcode, 0 }, |
| {"vdmulh.b.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_B_R_VX_M, MASK_VDMULH_B_R_VX_M, match_opcode, 0 }, |
| {"vdmulh.b.rn.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_B_RN_VV_M, MASK_VDMULH_B_RN_VV_M, match_opcode, 0 }, |
| {"vdmulh.b.rn.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_B_RN_VX_M, MASK_VDMULH_B_RN_VX_M, match_opcode, 0 }, |
| {"vdmulh.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_H_VV, MASK_VDMULH_H_VV, match_opcode, 0 }, |
| {"vdmulh.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_H_VX, MASK_VDMULH_H_VX, match_opcode, 0 }, |
| {"vdmulh.h.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_H_R_VV, MASK_VDMULH_H_R_VV, match_opcode, 0 }, |
| {"vdmulh.h.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_H_R_VX, MASK_VDMULH_H_R_VX, match_opcode, 0 }, |
| {"vdmulh.h.rn.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_H_RN_VV, MASK_VDMULH_H_RN_VV, match_opcode, 0 }, |
| {"vdmulh.h.rn.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_H_RN_VX, MASK_VDMULH_H_RN_VX, match_opcode, 0 }, |
| {"vdmulh.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_H_VV_M, MASK_VDMULH_H_VV_M, match_opcode, 0 }, |
| {"vdmulh.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_H_VX_M, MASK_VDMULH_H_VX_M, match_opcode, 0 }, |
| {"vdmulh.h.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_H_R_VV_M, MASK_VDMULH_H_R_VV_M, match_opcode, 0 }, |
| {"vdmulh.h.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_H_R_VX_M, MASK_VDMULH_H_R_VX_M, match_opcode, 0 }, |
| {"vdmulh.h.rn.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_H_RN_VV_M, MASK_VDMULH_H_RN_VV_M, match_opcode, 0 }, |
| {"vdmulh.h.rn.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_H_RN_VX_M, MASK_VDMULH_H_RN_VX_M, match_opcode, 0 }, |
| {"vdmulh.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_W_VV, MASK_VDMULH_W_VV, match_opcode, 0 }, |
| {"vdmulh.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_W_VX, MASK_VDMULH_W_VX, match_opcode, 0 }, |
| {"vdmulh.w.r.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_W_R_VV, MASK_VDMULH_W_R_VV, match_opcode, 0 }, |
| {"vdmulh.w.r.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_W_R_VX, MASK_VDMULH_W_R_VX, match_opcode, 0 }, |
| {"vdmulh.w.rn.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_W_RN_VV, MASK_VDMULH_W_RN_VV, match_opcode, 0 }, |
| {"vdmulh.w.rn.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_W_RN_VX, MASK_VDMULH_W_RN_VX, match_opcode, 0 }, |
| {"vdmulh.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_W_VV_M, MASK_VDMULH_W_VV_M, match_opcode, 0 }, |
| {"vdmulh.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_W_VX_M, MASK_VDMULH_W_VX_M, match_opcode, 0 }, |
| {"vdmulh.w.r.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_W_R_VV_M, MASK_VDMULH_W_R_VV_M, match_opcode, 0 }, |
| {"vdmulh.w.r.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_W_R_VX_M, MASK_VDMULH_W_R_VX_M, match_opcode, 0 }, |
| {"vdmulh.w.rn.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VDMULH_W_RN_VV_M, MASK_VDMULH_W_RN_VV_M, match_opcode, 0 }, |
| {"vdmulh.w.rn.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VDMULH_W_RN_VX_M, MASK_VDMULH_W_RN_VX_M, match_opcode, 0 }, |
| {"vmacc.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMACC_B_VV, MASK_VMACC_B_VV, match_opcode, 0 }, |
| {"vmacc.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMACC_B_VX, MASK_VMACC_B_VX, match_opcode, 0 }, |
| {"vmacc.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMACC_B_VV_M, MASK_VMACC_B_VV_M, match_opcode, 0 }, |
| {"vmacc.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMACC_B_VX_M, MASK_VMACC_B_VX_M, match_opcode, 0 }, |
| {"vmacc.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMACC_H_VV, MASK_VMACC_H_VV, match_opcode, 0 }, |
| {"vmacc.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMACC_H_VX, MASK_VMACC_H_VX, match_opcode, 0 }, |
| {"vmacc.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMACC_H_VV_M, MASK_VMACC_H_VV_M, match_opcode, 0 }, |
| {"vmacc.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMACC_H_VX_M, MASK_VMACC_H_VX_M, match_opcode, 0 }, |
| {"vmacc.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMACC_W_VV, MASK_VMACC_W_VV, match_opcode, 0 }, |
| {"vmacc.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMACC_W_VX, MASK_VMACC_W_VX, match_opcode, 0 }, |
| {"vmacc.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMACC_W_VV_M, MASK_VMACC_W_VV_M, match_opcode, 0 }, |
| {"vmacc.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMACC_W_VX_M, MASK_VMACC_W_VX_M, match_opcode, 0 }, |
| {"vmadd.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMADD_B_VV, MASK_VMADD_B_VV, match_opcode, 0 }, |
| {"vmadd.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMADD_B_VX, MASK_VMADD_B_VX, match_opcode, 0 }, |
| {"vmadd.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMADD_B_VV_M, MASK_VMADD_B_VV_M, match_opcode, 0 }, |
| {"vmadd.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMADD_B_VX_M, MASK_VMADD_B_VX_M, match_opcode, 0 }, |
| {"vmadd.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMADD_H_VV, MASK_VMADD_H_VV, match_opcode, 0 }, |
| {"vmadd.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMADD_H_VX, MASK_VMADD_H_VX, match_opcode, 0 }, |
| {"vmadd.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMADD_H_VV_M, MASK_VMADD_H_VV_M, match_opcode, 0 }, |
| {"vmadd.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMADD_H_VX_M, MASK_VMADD_H_VX_M, match_opcode, 0 }, |
| {"vmadd.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMADD_W_VV, MASK_VMADD_W_VV, match_opcode, 0 }, |
| {"vmadd.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMADD_W_VX, MASK_VMADD_W_VX, match_opcode, 0 }, |
| {"vmadd.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VMADD_W_VV_M, MASK_VMADD_W_VV_M, match_opcode, 0 }, |
| {"vmadd.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VMADD_W_VX_M, MASK_VMADD_W_VX_M, match_opcode, 0 }, |
| |
| // 110 Shuffle |
| {"vsliden.b.1.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_B_1_VV, MASK_VSLIDEN_B_1_VV, match_opcode, 0 }, |
| {"vsliden.b.1.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_B_1_VX, MASK_VSLIDEN_B_1_VX, match_opcode, 0 }, |
| {"vsliden.b.2.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_B_2_VV, MASK_VSLIDEN_B_2_VV, match_opcode, 0 }, |
| {"vsliden.b.2.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_B_2_VX, MASK_VSLIDEN_B_2_VX, match_opcode, 0 }, |
| {"vsliden.b.3.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_B_3_VV, MASK_VSLIDEN_B_3_VV, match_opcode, 0 }, |
| {"vsliden.b.3.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_B_3_VX, MASK_VSLIDEN_B_3_VX, match_opcode, 0 }, |
| {"vsliden.b.4.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_B_4_VV, MASK_VSLIDEN_B_4_VV, match_opcode, 0 }, |
| {"vsliden.b.4.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_B_4_VX, MASK_VSLIDEN_B_4_VX, match_opcode, 0 }, |
| {"vsliden.h.1.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_H_1_VV, MASK_VSLIDEN_H_1_VV, match_opcode, 0 }, |
| {"vsliden.h.1.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_H_1_VX, MASK_VSLIDEN_H_1_VX, match_opcode, 0 }, |
| {"vsliden.h.2.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_H_2_VV, MASK_VSLIDEN_H_2_VV, match_opcode, 0 }, |
| {"vsliden.h.2.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_H_2_VX, MASK_VSLIDEN_H_2_VX, match_opcode, 0 }, |
| {"vsliden.h.3.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_H_3_VV, MASK_VSLIDEN_H_3_VV, match_opcode, 0 }, |
| {"vsliden.h.3.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_H_3_VX, MASK_VSLIDEN_H_3_VX, match_opcode, 0 }, |
| {"vsliden.h.4.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_H_4_VV, MASK_VSLIDEN_H_4_VV, match_opcode, 0 }, |
| {"vsliden.h.4.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_H_4_VX, MASK_VSLIDEN_H_4_VX, match_opcode, 0 }, |
| {"vsliden.w.1.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_W_1_VV, MASK_VSLIDEN_W_1_VV, match_opcode, 0 }, |
| {"vsliden.w.1.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_W_1_VX, MASK_VSLIDEN_W_1_VX, match_opcode, 0 }, |
| {"vsliden.w.2.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_W_2_VV, MASK_VSLIDEN_W_2_VV, match_opcode, 0 }, |
| {"vsliden.w.2.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_W_2_VX, MASK_VSLIDEN_W_2_VX, match_opcode, 0 }, |
| {"vsliden.w.3.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_W_3_VV, MASK_VSLIDEN_W_3_VV, match_opcode, 0 }, |
| {"vsliden.w.3.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_W_3_VX, MASK_VSLIDEN_W_3_VX, match_opcode, 0 }, |
| {"vsliden.w.4.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEN_W_4_VV, MASK_VSLIDEN_W_4_VV, match_opcode, 0 }, |
| {"vsliden.w.4.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEN_W_4_VX, MASK_VSLIDEN_W_4_VX, match_opcode, 0 }, |
| {"vslidevn.b.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_B_1_VV_M, MASK_VSLIDEVN_B_1_VV_M, match_opcode, 0 }, |
| {"vslidevn.b.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_B_1_VX_M, MASK_VSLIDEVN_B_1_VX_M, match_opcode, 0 }, |
| {"vslidevn.b.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_B_2_VV_M, MASK_VSLIDEVN_B_2_VV_M, match_opcode, 0 }, |
| {"vslidevn.b.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_B_2_VX_M, MASK_VSLIDEVN_B_2_VX_M, match_opcode, 0 }, |
| {"vslidevn.b.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_B_3_VV_M, MASK_VSLIDEVN_B_3_VV_M, match_opcode, 0 }, |
| {"vslidevn.b.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_B_3_VX_M, MASK_VSLIDEVN_B_3_VX_M, match_opcode, 0 }, |
| {"vslidevn.b.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_B_4_VV_M, MASK_VSLIDEVN_B_4_VV_M, match_opcode, 0 }, |
| {"vslidevn.b.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_B_4_VX_M, MASK_VSLIDEVN_B_4_VX_M, match_opcode, 0 }, |
| {"vslidevn.h.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_H_1_VV_M, MASK_VSLIDEVN_H_1_VV_M, match_opcode, 0 }, |
| {"vslidevn.h.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_H_1_VX_M, MASK_VSLIDEVN_H_1_VX_M, match_opcode, 0 }, |
| {"vslidevn.h.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_H_2_VV_M, MASK_VSLIDEVN_H_2_VV_M, match_opcode, 0 }, |
| {"vslidevn.h.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_H_2_VX_M, MASK_VSLIDEVN_H_2_VX_M, match_opcode, 0 }, |
| {"vslidevn.h.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_H_3_VV_M, MASK_VSLIDEVN_H_3_VV_M, match_opcode, 0 }, |
| {"vslidevn.h.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_H_3_VX_M, MASK_VSLIDEVN_H_3_VX_M, match_opcode, 0 }, |
| {"vslidevn.h.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_H_4_VV_M, MASK_VSLIDEVN_H_4_VV_M, match_opcode, 0 }, |
| {"vslidevn.h.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_H_4_VX_M, MASK_VSLIDEVN_H_4_VX_M, match_opcode, 0 }, |
| {"vslidevn.w.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_W_1_VV_M, MASK_VSLIDEVN_W_1_VV_M, match_opcode, 0 }, |
| {"vslidevn.w.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_W_1_VX_M, MASK_VSLIDEVN_W_1_VX_M, match_opcode, 0 }, |
| {"vslidevn.w.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_W_2_VV_M, MASK_VSLIDEVN_W_2_VV_M, match_opcode, 0 }, |
| {"vslidevn.w.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_W_2_VX_M, MASK_VSLIDEVN_W_2_VX_M, match_opcode, 0 }, |
| {"vslidevn.w.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_W_3_VV_M, MASK_VSLIDEVN_W_3_VV_M, match_opcode, 0 }, |
| {"vslidevn.w.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_W_3_VX_M, MASK_VSLIDEVN_W_3_VX_M, match_opcode, 0 }, |
| {"vslidevn.w.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVN_W_4_VV_M, MASK_VSLIDEVN_W_4_VV_M, match_opcode, 0 }, |
| {"vslidevn.w.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVN_W_4_VX_M, MASK_VSLIDEVN_W_4_VX_M, match_opcode, 0 }, |
| {"vslidehn.b.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_B_1_VV_M, MASK_VSLIDEHN_B_1_VV_M, match_opcode, 0 }, |
| {"vslidehn.b.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_B_1_VX_M, MASK_VSLIDEHN_B_1_VX_M, match_opcode, 0 }, |
| {"vslidehn.b.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_B_2_VV_M, MASK_VSLIDEHN_B_2_VV_M, match_opcode, 0 }, |
| {"vslidehn.b.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_B_2_VX_M, MASK_VSLIDEHN_B_2_VX_M, match_opcode, 0 }, |
| {"vslidehn.b.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_B_3_VV_M, MASK_VSLIDEHN_B_3_VV_M, match_opcode, 0 }, |
| {"vslidehn.b.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_B_3_VX_M, MASK_VSLIDEHN_B_3_VX_M, match_opcode, 0 }, |
| {"vslidehn.b.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_B_4_VV_M, MASK_VSLIDEHN_B_4_VV_M, match_opcode, 0 }, |
| {"vslidehn.b.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_B_4_VX_M, MASK_VSLIDEHN_B_4_VX_M, match_opcode, 0 }, |
| {"vslidehn.h.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_H_1_VV_M, MASK_VSLIDEHN_H_1_VV_M, match_opcode, 0 }, |
| {"vslidehn.h.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_H_1_VX_M, MASK_VSLIDEHN_H_1_VX_M, match_opcode, 0 }, |
| {"vslidehn.h.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_H_2_VV_M, MASK_VSLIDEHN_H_2_VV_M, match_opcode, 0 }, |
| {"vslidehn.h.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_H_2_VX_M, MASK_VSLIDEHN_H_2_VX_M, match_opcode, 0 }, |
| {"vslidehn.h.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_H_3_VV_M, MASK_VSLIDEHN_H_3_VV_M, match_opcode, 0 }, |
| {"vslidehn.h.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_H_3_VX_M, MASK_VSLIDEHN_H_3_VX_M, match_opcode, 0 }, |
| {"vslidehn.h.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_H_4_VV_M, MASK_VSLIDEHN_H_4_VV_M, match_opcode, 0 }, |
| {"vslidehn.h.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_H_4_VX_M, MASK_VSLIDEHN_H_4_VX_M, match_opcode, 0 }, |
| {"vslidehn.w.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_W_1_VV_M, MASK_VSLIDEHN_W_1_VV_M, match_opcode, 0 }, |
| {"vslidehn.w.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_W_1_VX_M, MASK_VSLIDEHN_W_1_VX_M, match_opcode, 0 }, |
| {"vslidehn.w.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_W_2_VV_M, MASK_VSLIDEHN_W_2_VV_M, match_opcode, 0 }, |
| {"vslidehn.w.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_W_2_VX_M, MASK_VSLIDEHN_W_2_VX_M, match_opcode, 0 }, |
| {"vslidehn.w.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_W_3_VV_M, MASK_VSLIDEHN_W_3_VV_M, match_opcode, 0 }, |
| {"vslidehn.w.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_W_3_VX_M, MASK_VSLIDEHN_W_3_VX_M, match_opcode, 0 }, |
| {"vslidehn.w.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHN_W_4_VV_M, MASK_VSLIDEHN_W_4_VV_M, match_opcode, 0 }, |
| {"vslidehn.w.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHN_W_4_VX_M, MASK_VSLIDEHN_W_4_VX_M, match_opcode, 0 }, |
| {"vslidep.b.1.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_B_1_VV, MASK_VSLIDEP_B_1_VV, match_opcode, 0 }, |
| {"vslidep.b.1.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_B_1_VX, MASK_VSLIDEP_B_1_VX, match_opcode, 0 }, |
| {"vslidep.b.2.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_B_2_VV, MASK_VSLIDEP_B_2_VV, match_opcode, 0 }, |
| {"vslidep.b.2.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_B_2_VX, MASK_VSLIDEP_B_2_VX, match_opcode, 0 }, |
| {"vslidep.b.3.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_B_3_VV, MASK_VSLIDEP_B_3_VV, match_opcode, 0 }, |
| {"vslidep.b.3.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_B_3_VX, MASK_VSLIDEP_B_3_VX, match_opcode, 0 }, |
| {"vslidep.b.4.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_B_4_VV, MASK_VSLIDEP_B_4_VV, match_opcode, 0 }, |
| {"vslidep.b.4.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_B_4_VX, MASK_VSLIDEP_B_4_VX, match_opcode, 0 }, |
| {"vslidep.h.1.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_H_1_VV, MASK_VSLIDEP_H_1_VV, match_opcode, 0 }, |
| {"vslidep.h.1.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_H_1_VX, MASK_VSLIDEP_H_1_VX, match_opcode, 0 }, |
| {"vslidep.h.2.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_H_2_VV, MASK_VSLIDEP_H_2_VV, match_opcode, 0 }, |
| {"vslidep.h.2.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_H_2_VX, MASK_VSLIDEP_H_2_VX, match_opcode, 0 }, |
| {"vslidep.h.3.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_H_3_VV, MASK_VSLIDEP_H_3_VV, match_opcode, 0 }, |
| {"vslidep.h.3.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_H_3_VX, MASK_VSLIDEP_H_3_VX, match_opcode, 0 }, |
| {"vslidep.h.4.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_H_4_VV, MASK_VSLIDEP_H_4_VV, match_opcode, 0 }, |
| {"vslidep.h.4.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_H_4_VX, MASK_VSLIDEP_H_4_VX, match_opcode, 0 }, |
| {"vslidep.w.1.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_W_1_VV, MASK_VSLIDEP_W_1_VV, match_opcode, 0 }, |
| {"vslidep.w.1.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_W_1_VX, MASK_VSLIDEP_W_1_VX, match_opcode, 0 }, |
| {"vslidep.w.2.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_W_2_VV, MASK_VSLIDEP_W_2_VV, match_opcode, 0 }, |
| {"vslidep.w.2.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_W_2_VX, MASK_VSLIDEP_W_2_VX, match_opcode, 0 }, |
| {"vslidep.w.3.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_W_3_VV, MASK_VSLIDEP_W_3_VV, match_opcode, 0 }, |
| {"vslidep.w.3.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_W_3_VX, MASK_VSLIDEP_W_3_VX, match_opcode, 0 }, |
| {"vslidep.w.4.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEP_W_4_VV, MASK_VSLIDEP_W_4_VV, match_opcode, 0 }, |
| {"vslidep.w.4.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEP_W_4_VX, MASK_VSLIDEP_W_4_VX, match_opcode, 0 }, |
| {"vslidevp.b.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_B_1_VV_M, MASK_VSLIDEVP_B_1_VV_M, match_opcode, 0 }, |
| {"vslidevp.b.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_B_1_VX_M, MASK_VSLIDEVP_B_1_VX_M, match_opcode, 0 }, |
| {"vslidevp.b.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_B_2_VV_M, MASK_VSLIDEVP_B_2_VV_M, match_opcode, 0 }, |
| {"vslidevp.b.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_B_2_VX_M, MASK_VSLIDEVP_B_2_VX_M, match_opcode, 0 }, |
| {"vslidevp.b.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_B_3_VV_M, MASK_VSLIDEVP_B_3_VV_M, match_opcode, 0 }, |
| {"vslidevp.b.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_B_3_VX_M, MASK_VSLIDEVP_B_3_VX_M, match_opcode, 0 }, |
| {"vslidevp.b.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_B_4_VV_M, MASK_VSLIDEVP_B_4_VV_M, match_opcode, 0 }, |
| {"vslidevp.b.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_B_4_VX_M, MASK_VSLIDEVP_B_4_VX_M, match_opcode, 0 }, |
| {"vslidevp.h.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_H_1_VV_M, MASK_VSLIDEVP_H_1_VV_M, match_opcode, 0 }, |
| {"vslidevp.h.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_H_1_VX_M, MASK_VSLIDEVP_H_1_VX_M, match_opcode, 0 }, |
| {"vslidevp.h.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_H_2_VV_M, MASK_VSLIDEVP_H_2_VV_M, match_opcode, 0 }, |
| {"vslidevp.h.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_H_2_VX_M, MASK_VSLIDEVP_H_2_VX_M, match_opcode, 0 }, |
| {"vslidevp.h.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_H_3_VV_M, MASK_VSLIDEVP_H_3_VV_M, match_opcode, 0 }, |
| {"vslidevp.h.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_H_3_VX_M, MASK_VSLIDEVP_H_3_VX_M, match_opcode, 0 }, |
| {"vslidevp.h.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_H_4_VV_M, MASK_VSLIDEVP_H_4_VV_M, match_opcode, 0 }, |
| {"vslidevp.h.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_H_4_VX_M, MASK_VSLIDEVP_H_4_VX_M, match_opcode, 0 }, |
| {"vslidevp.w.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_W_1_VV_M, MASK_VSLIDEVP_W_1_VV_M, match_opcode, 0 }, |
| {"vslidevp.w.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_W_1_VX_M, MASK_VSLIDEVP_W_1_VX_M, match_opcode, 0 }, |
| {"vslidevp.w.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_W_2_VV_M, MASK_VSLIDEVP_W_2_VV_M, match_opcode, 0 }, |
| {"vslidevp.w.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_W_2_VX_M, MASK_VSLIDEVP_W_2_VX_M, match_opcode, 0 }, |
| {"vslidevp.w.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_W_3_VV_M, MASK_VSLIDEVP_W_3_VV_M, match_opcode, 0 }, |
| {"vslidevp.w.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_W_3_VX_M, MASK_VSLIDEVP_W_3_VX_M, match_opcode, 0 }, |
| {"vslidevp.w.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEVP_W_4_VV_M, MASK_VSLIDEVP_W_4_VV_M, match_opcode, 0 }, |
| {"vslidevp.w.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEVP_W_4_VX_M, MASK_VSLIDEVP_W_4_VX_M, match_opcode, 0 }, |
| {"vslidehp.b.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_B_1_VV_M, MASK_VSLIDEHP_B_1_VV_M, match_opcode, 0 }, |
| {"vslidehp.b.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_B_1_VX_M, MASK_VSLIDEHP_B_1_VX_M, match_opcode, 0 }, |
| {"vslidehp.b.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_B_2_VV_M, MASK_VSLIDEHP_B_2_VV_M, match_opcode, 0 }, |
| {"vslidehp.b.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_B_2_VX_M, MASK_VSLIDEHP_B_2_VX_M, match_opcode, 0 }, |
| {"vslidehp.b.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_B_3_VV_M, MASK_VSLIDEHP_B_3_VV_M, match_opcode, 0 }, |
| {"vslidehp.b.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_B_3_VX_M, MASK_VSLIDEHP_B_3_VX_M, match_opcode, 0 }, |
| {"vslidehp.b.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_B_4_VV_M, MASK_VSLIDEHP_B_4_VV_M, match_opcode, 0 }, |
| {"vslidehp.b.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_B_4_VX_M, MASK_VSLIDEHP_B_4_VX_M, match_opcode, 0 }, |
| {"vslidehp.h.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_H_1_VV_M, MASK_VSLIDEHP_H_1_VV_M, match_opcode, 0 }, |
| {"vslidehp.h.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_H_1_VX_M, MASK_VSLIDEHP_H_1_VX_M, match_opcode, 0 }, |
| {"vslidehp.h.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_H_2_VV_M, MASK_VSLIDEHP_H_2_VV_M, match_opcode, 0 }, |
| {"vslidehp.h.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_H_2_VX_M, MASK_VSLIDEHP_H_2_VX_M, match_opcode, 0 }, |
| {"vslidehp.h.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_H_3_VV_M, MASK_VSLIDEHP_H_3_VV_M, match_opcode, 0 }, |
| {"vslidehp.h.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_H_3_VX_M, MASK_VSLIDEHP_H_3_VX_M, match_opcode, 0 }, |
| {"vslidehp.h.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_H_4_VV_M, MASK_VSLIDEHP_H_4_VV_M, match_opcode, 0 }, |
| {"vslidehp.h.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_H_4_VX_M, MASK_VSLIDEHP_H_4_VX_M, match_opcode, 0 }, |
| {"vslidehp.w.1.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_W_1_VV_M, MASK_VSLIDEHP_W_1_VV_M, match_opcode, 0 }, |
| {"vslidehp.w.1.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_W_1_VX_M, MASK_VSLIDEHP_W_1_VX_M, match_opcode, 0 }, |
| {"vslidehp.w.2.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_W_2_VV_M, MASK_VSLIDEHP_W_2_VV_M, match_opcode, 0 }, |
| {"vslidehp.w.2.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_W_2_VX_M, MASK_VSLIDEHP_W_2_VX_M, match_opcode, 0 }, |
| {"vslidehp.w.3.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_W_3_VV_M, MASK_VSLIDEHP_W_3_VV_M, match_opcode, 0 }, |
| {"vslidehp.w.3.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_W_3_VX_M, MASK_VSLIDEHP_W_3_VX_M, match_opcode, 0 }, |
| {"vslidehp.w.4.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSLIDEHP_W_4_VV_M, MASK_VSLIDEHP_W_4_VV_M, match_opcode, 0 }, |
| {"vslidehp.w.4.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSLIDEHP_W_4_VX_M, MASK_VSLIDEHP_W_4_VX_M, match_opcode, 0 }, |
| {"vsel.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSEL_B_VV, MASK_VSEL_B_VV, match_opcode, 0 }, |
| {"vsel.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSEL_B_VX, MASK_VSEL_B_VX, match_opcode, 0 }, |
| {"vsel.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSEL_B_VV_M, MASK_VSEL_B_VV_M, match_opcode, 0 }, |
| {"vsel.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSEL_B_VX_M, MASK_VSEL_B_VX_M, match_opcode, 0 }, |
| {"vsel.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSEL_H_VV, MASK_VSEL_H_VV, match_opcode, 0 }, |
| {"vsel.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSEL_H_VX, MASK_VSEL_H_VX, match_opcode, 0 }, |
| {"vsel.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSEL_H_VV_M, MASK_VSEL_H_VV_M, match_opcode, 0 }, |
| {"vsel.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSEL_H_VX_M, MASK_VSEL_H_VX_M, match_opcode, 0 }, |
| {"vsel.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSEL_W_VV, MASK_VSEL_W_VV, match_opcode, 0 }, |
| {"vsel.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSEL_W_VX, MASK_VSEL_W_VX, match_opcode, 0 }, |
| {"vsel.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VSEL_W_VV_M, MASK_VSEL_W_VV_M, match_opcode, 0 }, |
| {"vsel.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VSEL_W_VX_M, MASK_VSEL_W_VX_M, match_opcode, 0 }, |
| {"vevn.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVN_B_VV, MASK_VEVN_B_VV, match_opcode, 0 }, |
| {"vevn.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVN_B_VX, MASK_VEVN_B_VX, match_opcode, 0 }, |
| {"vevn.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVN_B_VV_M, MASK_VEVN_B_VV_M, match_opcode, 0 }, |
| {"vevn.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVN_B_VX_M, MASK_VEVN_B_VX_M, match_opcode, 0 }, |
| {"vevn.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVN_H_VV, MASK_VEVN_H_VV, match_opcode, 0 }, |
| {"vevn.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVN_H_VX, MASK_VEVN_H_VX, match_opcode, 0 }, |
| {"vevn.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVN_H_VV_M, MASK_VEVN_H_VV_M, match_opcode, 0 }, |
| {"vevn.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVN_H_VX_M, MASK_VEVN_H_VX_M, match_opcode, 0 }, |
| {"vevn.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVN_W_VV, MASK_VEVN_W_VV, match_opcode, 0 }, |
| {"vevn.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVN_W_VX, MASK_VEVN_W_VX, match_opcode, 0 }, |
| {"vevn.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVN_W_VV_M, MASK_VEVN_W_VV_M, match_opcode, 0 }, |
| {"vevn.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVN_W_VX_M, MASK_VEVN_W_VX_M, match_opcode, 0 }, |
| {"vodd.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VODD_B_VV, MASK_VODD_B_VV, match_opcode, 0 }, |
| {"vodd.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VODD_B_VX, MASK_VODD_B_VX, match_opcode, 0 }, |
| {"vodd.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VODD_B_VV_M, MASK_VODD_B_VV_M, match_opcode, 0 }, |
| {"vodd.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VODD_B_VX_M, MASK_VODD_B_VX_M, match_opcode, 0 }, |
| {"vodd.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VODD_H_VV, MASK_VODD_H_VV, match_opcode, 0 }, |
| {"vodd.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VODD_H_VX, MASK_VODD_H_VX, match_opcode, 0 }, |
| {"vodd.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VODD_H_VV_M, MASK_VODD_H_VV_M, match_opcode, 0 }, |
| {"vodd.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VODD_H_VX_M, MASK_VODD_H_VX_M, match_opcode, 0 }, |
| {"vodd.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VODD_W_VV, MASK_VODD_W_VV, match_opcode, 0 }, |
| {"vodd.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VODD_W_VX, MASK_VODD_W_VX, match_opcode, 0 }, |
| {"vodd.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VODD_W_VV_M, MASK_VODD_W_VV_M, match_opcode, 0 }, |
| {"vodd.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VODD_W_VX_M, MASK_VODD_W_VX_M, match_opcode, 0 }, |
| {"vevnodd.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVNODD_B_VV, MASK_VEVNODD_B_VV, match_opcode, 0 }, |
| {"vevnodd.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVNODD_B_VX, MASK_VEVNODD_B_VX, match_opcode, 0 }, |
| {"vevnodd.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVNODD_B_VV_M, MASK_VEVNODD_B_VV_M, match_opcode, 0 }, |
| {"vevnodd.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVNODD_B_VX_M, MASK_VEVNODD_B_VX_M, match_opcode, 0 }, |
| {"vevnodd.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVNODD_H_VV, MASK_VEVNODD_H_VV, match_opcode, 0 }, |
| {"vevnodd.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVNODD_H_VX, MASK_VEVNODD_H_VX, match_opcode, 0 }, |
| {"vevnodd.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVNODD_H_VV_M, MASK_VEVNODD_H_VV_M, match_opcode, 0 }, |
| {"vevnodd.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVNODD_H_VX_M, MASK_VEVNODD_H_VX_M, match_opcode, 0 }, |
| {"vevnodd.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVNODD_W_VV, MASK_VEVNODD_W_VV, match_opcode, 0 }, |
| {"vevnodd.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVNODD_W_VX, MASK_VEVNODD_W_VX, match_opcode, 0 }, |
| {"vevnodd.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VEVNODD_W_VV_M, MASK_VEVNODD_W_VV_M, match_opcode, 0 }, |
| {"vevnodd.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VEVNODD_W_VX_M, MASK_VEVNODD_W_VX_M, match_opcode, 0 }, |
| {"vzip.b.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VZIP_B_VV, MASK_VZIP_B_VV, match_opcode, 0 }, |
| {"vzip.b.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VZIP_B_VX, MASK_VZIP_B_VX, match_opcode, 0 }, |
| {"vzip.b.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VZIP_B_VV_M, MASK_VZIP_B_VV_M, match_opcode, 0 }, |
| {"vzip.b.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VZIP_B_VX_M, MASK_VZIP_B_VX_M, match_opcode, 0 }, |
| {"vzip.h.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VZIP_H_VV, MASK_VZIP_H_VV, match_opcode, 0 }, |
| {"vzip.h.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VZIP_H_VX, MASK_VZIP_H_VX, match_opcode, 0 }, |
| {"vzip.h.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VZIP_H_VV_M, MASK_VZIP_H_VV_M, match_opcode, 0 }, |
| {"vzip.h.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VZIP_H_VX_M, MASK_VZIP_H_VX_M, match_opcode, 0 }, |
| {"vzip.w.vv", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VZIP_W_VV, MASK_VZIP_W_VV, match_opcode, 0 }, |
| {"vzip.w.vx", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VZIP_W_VX, MASK_VZIP_W_VX, match_opcode, 0 }, |
| {"vzip.w.vv.m", 0, INSN_CLASS_K, "Vd,Vs,Vt", MATCH_VZIP_W_VV_M, MASK_VZIP_W_VV_M, match_opcode, 0 }, |
| {"vzip.w.vx.m", 0, INSN_CLASS_K, "Vd,Vs,t", MATCH_VZIP_W_VX_M, MASK_VZIP_W_VX_M, match_opcode, 0 }, |
| |
| // 3arg |
| {"aconv.vxv", 0, INSN_CLASS_K, "Vd,Vs,t,Vr", MATCH_ACONV_VXV, MASK_ACONV_VXV, match_opcode, 0 }, |
| {"adwconv.vxv", 0, INSN_CLASS_K, "Vd,Vs,t,Vr", MATCH_ADWCONV_VXV, MASK_ADWCONV_VXV, match_opcode, 0 }, |
| {"vdwconv.vxv", 0, INSN_CLASS_K, "Vd,Vs,t,Vr", MATCH_VDWCONV_VXV, MASK_VDWCONV_VXV, match_opcode, 0 }, |
| |
| // clang-format on |