vmmplatsupport & vm: add support for odroidc2 Code and headers for odroidc2 platform support
diff --git a/libsel4vm/src/arch/arm/vgic/vgic.c b/libsel4vm/src/arch/arm/vgic/vgic.c index 8e084d0..09265c7 100644 --- a/libsel4vm/src/arch/arm/vgic/vgic.c +++ b/libsel4vm/src/arch/arm/vgic/vgic.c
@@ -86,6 +86,8 @@ #define GIC_PADDR 0x03880000 #elif defined(CONFIG_PLAT_QEMU_ARM_VIRT) #define GIC_PADDR 0x8000000 +#elif defined(CONFIG_PLAT_ODROIDC2) +#define GIC_PADDR 0xc4300000 #else #error "Unsupported platform for GIC" #endif
diff --git a/libsel4vmmplatsupport/plat_include/odroidc2/sel4vmmplatsupport/plat/guest_vcpu_util.h b/libsel4vmmplatsupport/plat_include/odroidc2/sel4vmmplatsupport/plat/guest_vcpu_util.h new file mode 100644 index 0000000..c48d046 --- /dev/null +++ b/libsel4vmmplatsupport/plat_include/odroidc2/sel4vmmplatsupport/plat/guest_vcpu_util.h
@@ -0,0 +1,13 @@ +/* + * Copyright 2020, Data61 + * Commonwealth Scientific and Industrial Research Organisation (CSIRO) + * ABN 41 687 119 230. + * + * This software may be distributed and modified according to the terms of + * the BSD 2-Clause license. Note that NO WARRANTY is provided. + * See "LICENSE_BSD2.txt" for details. + * + * @TAG(DATA61_BSD) + */ + +#define PLAT_CPU_COMPAT "arm,cortex-a53"
diff --git a/libsel4vmmplatsupport/plat_include/odroidc2/sel4vmmplatsupport/plat/vpci.h b/libsel4vmmplatsupport/plat_include/odroidc2/sel4vmmplatsupport/plat/vpci.h new file mode 100644 index 0000000..8b19401 --- /dev/null +++ b/libsel4vmmplatsupport/plat_include/odroidc2/sel4vmmplatsupport/plat/vpci.h
@@ -0,0 +1,32 @@ +/* + * Copyright 2020, Data61 + * Commonwealth Scientific and Industrial Research Organisation (CSIRO) + * ABN 41 687 119 230. + * + * This software may be distributed and modified according to the terms of + * the BSD 2-Clause license. Note that NO WARRANTY is provided. + * See "LICENSE_BSD2.txt" for details. + * + * @TAG(DATA61_BSD) + */ +#pragma once + +/* PCI host bridge memory regions are defined in the pci dts node + * supplied to the Linux guest. These values are also reflected here. + */ + +/* PCI host bridge configration space */ +#define PCI_CFG_REGION_ADDR 0x3E000000 +/* PCI host bridge IO space */ +#define PCI_IO_REGION_ADDR 0x3D000000 +/* Size of PCI configuration space */ +#define PCI_CFG_REGION_SIZE 0x1000000 +/* Size of PCI IO space */ +#define PCI_IO_REGION_SIZE 0x10000 +/* PCI memory space */ +#define PCI_MEM_REGION_ADDR 0x3F000000 +/* PCI memory space size */ +#define PCI_MEM_REGION_SIZE 0x1000000 + +/* FDT IRQ controller address cells definition */ +#define GIC_ADDRESS_CELLS 0x2
diff --git a/libsel4vmmplatsupport/src/arch/arm/guest_image.c b/libsel4vmmplatsupport/src/arch/arm/guest_image.c index cfb8547..9f35270 100644 --- a/libsel4vmmplatsupport/src/arch/arm/guest_image.c +++ b/libsel4vmmplatsupport/src/arch/arm/guest_image.c
@@ -214,7 +214,8 @@ /* Determine the load address */ switch (ret_file_type) { case IMG_BIN: - if (config_set(CONFIG_PLAT_TX1) || config_set(CONFIG_PLAT_TX2) || config_set(CONFIG_PLAT_QEMU_ARM_VIRT)) { + if (config_set(CONFIG_PLAT_TX1) || config_set(CONFIG_PLAT_TX2) || config_set(CONFIG_PLAT_QEMU_ARM_VIRT) + || config_set(CONFIG_PLAT_ODROIDC2)) { /* This is likely an aarch64/aarch32 linux difference */ load_addr = load_base_addr + 0x80000; } else {