commit 7476936470563282bbfc1cfa2ab766353ef42f44
author Kent McLeod <Kent.Mcleod@data61.csiro.au> Tue Jul 23 08:58:58 2019 +1000
committer Kent McLeod <Kent.Mcleod@data61.csiro.au> Tue Jul 23 09:01:59 2019 +1000
tree 7d34fd4e8691bd106eb5393bbad37f39107b0011
parent 8869a2c6368125008c5a8e4dbaa1e0ff659f0a47

riscv: Add FENCE.I instruction in ELF loading code

Writes to executable memory may not become visible to execution until
after FENCE.I instruction. This prevents programs loaded by this
function crashing due to invalid program instructions.

libsel4utils/src/elf.c

diff --git a/libsel4utils/src/elf.c b/libsel4utils/src/elf.c
index 996e484..eb0d93b 100644
--- a/libsel4utils/src/elf.c
+++ b/libsel4utils/src/elf.c
@@ -130,7 +130,10 @@
         /* Flush the caches */
         seL4_ARM_Page_Unify_Instruction(loader_frame_cap.capPtr, 0, PAGE_SIZE_4K);
         seL4_ARM_Page_Unify_Instruction(loadee_frame_cap.capPtr, 0, PAGE_SIZE_4K);
-#endif /* CONFIG_ARCH_ARM */
+#elif CONFIG_ARCH_RISCV
+        /* Ensure that the writes to memory that may be executed become visible */
+        asm volatile("fence.i" ::: "memory");
+#endif
 
         /* now unmap the page in the loader address space */
         vspace_unmap_pages(loader_vspace, (void *) loader_vaddr, 1, seL4_PageBits, VSPACE_PRESERVE);