[#57956] renesas-da14592: Fix end addresses for chip revision tags

`CHIP_REVISION` is just inconsistent with the others also being 3-8 bits
that span 4 bytes. `CHIP_LAYOUT_REVISION`'s end address was invalid and
will cause throwing an exception after merging fix for `Range` creation
with `AbsoluteRangeToken` which is going to prevent start addresses
greater than end addresses.

platforms/cpus/renesas-da14592.repl

diff --git a/platforms/cpus/renesas-da14592.repl b/platforms/cpus/renesas-da14592.repl
index c483718..53e8f56 100644
--- a/platforms/cpus/renesas-da14592.repl
+++ b/platforms/cpus/renesas-da14592.repl
@@ -115,8 +115,8 @@
         Tag <0x50050208,0x5005020B> "CHIP_ID3" 0x33
         Tag <0x5005020C,0x5005020F> "CHIP_ID4" 0x34
         Tag <0x50050210,0x50050213> "CHIP_SWC" 0x2
-        Tag <0x50050214,0x50050214> "CHIP_REVISION" 0x41
-        Tag <0x500502F8,0x500502F4> "CHIP_LAYOUT_REVISION" 0x45
+        Tag <0x50050214,0x50050217> "CHIP_REVISION" 0x41
+        Tag <0x500502F8,0x500502FB> "CHIP_LAYOUT_REVISION" 0x45
         Tag <0x500502FC,0x500502FF> "CHIP_METAL_OPTION" 0x0
         Tag <0x50000100,0x50000163> "WAKE-UP_CONTROLLER" // WAKE_UP_CONTROLLER registers
         Tag <0x50020400,0x5002041F> "GENERAL_PURPOSE_or_ADC_1" // GENERAL_PURPOSE_or_ADC_1 registers