Integrate LLVM to llvm/llvm-project@7e751154a0e5 (#25009)

Bumps LLVM to llvm/llvm-project@7e751154a0e5. The GPU min/maxnumf carry
patch is dropped now that it landed upstream
(llvm/llvm-project@2e686411fa67).

Compatibility changes:

- Migrate AMDGPU target handling from the deprecated `amdgpu::Chipset`
(ISA version numbers) to `ROCDL::TargetInfo` (target feature queries),
following llvm/llvm-project@155462f440ff. The upstream AMDGPU/ROCDL
lowering entry points now take a `ROCDL::TargetInfo`, and the remaining
`Chipset` uses in IREE are migrated too since the deprecation warnings
fail the Bazel `-Werror` build. Behavior is preserved except where
upstream corrected it:
- Barriers on targets without hardware barrier back-off (e.g. gfx90c)
use the inline-asm `s_barrier` form, matching upstream.
  - OCP fp8 conversions are also recognized on gfx11.7.
- The wave64 flag for the HIP platform globals is derived from the
target, so wave32-only targets such as gfx1250 are handled correctly.
- Carry the MMA slice-cache correction for the regression introduced by
llvm/llvm-project@d287e55d0302.

Assisted-by: Claude Code

Signed-off-by: Pooja Hemashekar <hemashekar@roofline.ai>