| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| |* *| |
| |* IREE VM Operation Tables *| |
| |* *| |
| |* Automatically generated file, do not edit! *| |
| |* *| |
| \*===----------------------------------------------------------------------===*/ |
| |
| typedef enum { |
| IREE_VM_OP_CORE_GlobalLoadI32 = 0x00, |
| IREE_VM_OP_CORE_GlobalStoreI32 = 0x01, |
| IREE_VM_OP_CORE_GlobalLoadIndirectI32 = 0x02, |
| IREE_VM_OP_CORE_GlobalStoreIndirectI32 = 0x03, |
| IREE_VM_OP_CORE_GlobalLoadI64 = 0x04, |
| IREE_VM_OP_CORE_GlobalStoreI64 = 0x05, |
| IREE_VM_OP_CORE_GlobalLoadIndirectI64 = 0x06, |
| IREE_VM_OP_CORE_GlobalStoreIndirectI64 = 0x07, |
| IREE_VM_OP_CORE_GlobalLoadRef = 0x08, |
| IREE_VM_OP_CORE_GlobalStoreRef = 0x09, |
| IREE_VM_OP_CORE_GlobalLoadIndirectRef = 0x0A, |
| IREE_VM_OP_CORE_GlobalStoreIndirectRef = 0x0B, |
| IREE_VM_OP_CORE_ConstI32Zero = 0x0C, |
| IREE_VM_OP_CORE_ConstI32 = 0x0D, |
| IREE_VM_OP_CORE_ConstI64Zero = 0x0E, |
| IREE_VM_OP_CORE_ConstI64 = 0x0F, |
| IREE_VM_OP_CORE_ConstRefZero = 0x10, |
| IREE_VM_OP_CORE_ConstRefRodata = 0x11, |
| IREE_VM_OP_CORE_ListAlloc = 0x12, |
| IREE_VM_OP_CORE_ListReserve = 0x13, |
| IREE_VM_OP_CORE_ListSize = 0x14, |
| IREE_VM_OP_CORE_ListResize = 0x15, |
| IREE_VM_OP_CORE_ListGetI32 = 0x16, |
| IREE_VM_OP_CORE_ListSetI32 = 0x17, |
| IREE_VM_OP_CORE_ListGetI64 = 0x18, |
| IREE_VM_OP_CORE_ListSetI64 = 0x19, |
| IREE_VM_OP_CORE_ListGetRef = 0x1A, |
| IREE_VM_OP_CORE_ListSetRef = 0x1B, |
| IREE_VM_OP_CORE_SelectI32 = 0x1C, |
| IREE_VM_OP_CORE_SelectI64 = 0x1D, |
| IREE_VM_OP_CORE_SelectRef = 0x1E, |
| IREE_VM_OP_CORE_SwitchI32 = 0x1F, |
| IREE_VM_OP_CORE_SwitchI64 = 0x20, |
| IREE_VM_OP_CORE_SwitchRef = 0x21, |
| IREE_VM_OP_CORE_AddI32 = 0x22, |
| IREE_VM_OP_CORE_SubI32 = 0x23, |
| IREE_VM_OP_CORE_MulI32 = 0x24, |
| IREE_VM_OP_CORE_DivI32S = 0x25, |
| IREE_VM_OP_CORE_DivI32U = 0x26, |
| IREE_VM_OP_CORE_RemI32S = 0x27, |
| IREE_VM_OP_CORE_RemI32U = 0x28, |
| IREE_VM_OP_CORE_FMAI32 = 0x29, |
| IREE_VM_OP_CORE_AddI64 = 0x2A, |
| IREE_VM_OP_CORE_SubI64 = 0x2B, |
| IREE_VM_OP_CORE_MulI64 = 0x2C, |
| IREE_VM_OP_CORE_DivI64S = 0x2D, |
| IREE_VM_OP_CORE_DivI64U = 0x2E, |
| IREE_VM_OP_CORE_RemI64S = 0x2F, |
| IREE_VM_OP_CORE_RemI64U = 0x30, |
| IREE_VM_OP_CORE_FMAI64 = 0x31, |
| IREE_VM_OP_CORE_NotI32 = 0x32, |
| IREE_VM_OP_CORE_AndI32 = 0x33, |
| IREE_VM_OP_CORE_OrI32 = 0x34, |
| IREE_VM_OP_CORE_XorI32 = 0x35, |
| IREE_VM_OP_CORE_NotI64 = 0x36, |
| IREE_VM_OP_CORE_AndI64 = 0x37, |
| IREE_VM_OP_CORE_OrI64 = 0x38, |
| IREE_VM_OP_CORE_XorI64 = 0x39, |
| IREE_VM_OP_CORE_ShlI32 = 0x3A, |
| IREE_VM_OP_CORE_ShrI32S = 0x3B, |
| IREE_VM_OP_CORE_ShrI32U = 0x3C, |
| IREE_VM_OP_CORE_ShlI64 = 0x3D, |
| IREE_VM_OP_CORE_ShrI64S = 0x3E, |
| IREE_VM_OP_CORE_ShrI64U = 0x3F, |
| IREE_VM_OP_CORE_TruncI32I8 = 0x40, |
| IREE_VM_OP_CORE_TruncI32I16 = 0x41, |
| IREE_VM_OP_CORE_TruncI64I32 = 0x42, |
| IREE_VM_OP_CORE_ExtI8I32S = 0x43, |
| IREE_VM_OP_CORE_ExtI8I32U = 0x44, |
| IREE_VM_OP_CORE_ExtI16I32S = 0x45, |
| IREE_VM_OP_CORE_ExtI16I32U = 0x46, |
| IREE_VM_OP_CORE_ExtI32I64S = 0x47, |
| IREE_VM_OP_CORE_ExtI32I64U = 0x48, |
| IREE_VM_OP_CORE_CmpEQI32 = 0x49, |
| IREE_VM_OP_CORE_CmpNEI32 = 0x4A, |
| IREE_VM_OP_CORE_CmpLTI32S = 0x4B, |
| IREE_VM_OP_CORE_CmpLTI32U = 0x4C, |
| IREE_VM_OP_CORE_CmpNZI32 = 0x4D, |
| IREE_VM_OP_CORE_CmpEQI64 = 0x4E, |
| IREE_VM_OP_CORE_CmpNEI64 = 0x4F, |
| IREE_VM_OP_CORE_CmpLTI64S = 0x50, |
| IREE_VM_OP_CORE_CmpLTI64U = 0x51, |
| IREE_VM_OP_CORE_CmpNZI64 = 0x52, |
| IREE_VM_OP_CORE_CmpEQRef = 0x53, |
| IREE_VM_OP_CORE_CmpNERef = 0x54, |
| IREE_VM_OP_CORE_CmpNZRef = 0x55, |
| IREE_VM_OP_CORE_Branch = 0x56, |
| IREE_VM_OP_CORE_CondBranch = 0x57, |
| IREE_VM_OP_CORE_Call = 0x58, |
| IREE_VM_OP_CORE_CallVariadic = 0x59, |
| IREE_VM_OP_CORE_Return = 0x5A, |
| IREE_VM_OP_CORE_Fail = 0x5B, |
| IREE_VM_OP_CORE_ImportResolved = 0x5C, |
| IREE_VM_OP_CORE_Yield = 0x5D, |
| IREE_VM_OP_CORE_Trace = 0x5E, |
| IREE_VM_OP_CORE_Print = 0x5F, |
| IREE_VM_OP_CORE_CondBreak = 0x60, |
| IREE_VM_OP_CORE_Break = 0x61, |
| IREE_VM_OP_CORE_BufferLoadI8U = 0x62, |
| IREE_VM_OP_CORE_BufferLoadI8S = 0x63, |
| IREE_VM_OP_CORE_BufferLoadI16U = 0x64, |
| IREE_VM_OP_CORE_BufferLoadI16S = 0x65, |
| IREE_VM_OP_CORE_BufferLoadI32 = 0x66, |
| IREE_VM_OP_CORE_BufferLoadI64 = 0x67, |
| IREE_VM_OP_CORE_BufferStoreI8 = 0x68, |
| IREE_VM_OP_CORE_BufferStoreI16 = 0x69, |
| IREE_VM_OP_CORE_BufferStoreI32 = 0x6A, |
| IREE_VM_OP_CORE_BufferStoreI64 = 0x6B, |
| IREE_VM_OP_CORE_BufferAlloc = 0x6C, |
| IREE_VM_OP_CORE_BufferClone = 0x6D, |
| IREE_VM_OP_CORE_BufferLength = 0x6E, |
| IREE_VM_OP_CORE_BufferCopy = 0x6F, |
| IREE_VM_OP_CORE_BufferCompare = 0x70, |
| IREE_VM_OP_CORE_BufferFillI8 = 0x71, |
| IREE_VM_OP_CORE_BufferFillI16 = 0x72, |
| IREE_VM_OP_CORE_BufferFillI32 = 0x73, |
| IREE_VM_OP_CORE_BufferFillI64 = 0x74, |
| IREE_VM_OP_CORE_CtlzI32 = 0x75, |
| IREE_VM_OP_CORE_CtlzI64 = 0x76, |
| IREE_VM_OP_CORE_AbsI32 = 0x77, |
| IREE_VM_OP_CORE_AbsI64 = 0x78, |
| IREE_VM_OP_CORE_RSV_0x79, |
| IREE_VM_OP_CORE_RSV_0x7A, |
| IREE_VM_OP_CORE_RSV_0x7B, |
| IREE_VM_OP_CORE_RSV_0x7C, |
| IREE_VM_OP_CORE_RSV_0x7D, |
| IREE_VM_OP_CORE_RSV_0x7E, |
| IREE_VM_OP_CORE_RSV_0x7F, |
| IREE_VM_OP_CORE_RSV_0x80, |
| IREE_VM_OP_CORE_RSV_0x81, |
| IREE_VM_OP_CORE_RSV_0x82, |
| IREE_VM_OP_CORE_RSV_0x83, |
| IREE_VM_OP_CORE_RSV_0x84, |
| IREE_VM_OP_CORE_RSV_0x85, |
| IREE_VM_OP_CORE_RSV_0x86, |
| IREE_VM_OP_CORE_RSV_0x87, |
| IREE_VM_OP_CORE_RSV_0x88, |
| IREE_VM_OP_CORE_RSV_0x89, |
| IREE_VM_OP_CORE_RSV_0x8A, |
| IREE_VM_OP_CORE_RSV_0x8B, |
| IREE_VM_OP_CORE_RSV_0x8C, |
| IREE_VM_OP_CORE_RSV_0x8D, |
| IREE_VM_OP_CORE_RSV_0x8E, |
| IREE_VM_OP_CORE_RSV_0x8F, |
| IREE_VM_OP_CORE_RSV_0x90, |
| IREE_VM_OP_CORE_RSV_0x91, |
| IREE_VM_OP_CORE_RSV_0x92, |
| IREE_VM_OP_CORE_RSV_0x93, |
| IREE_VM_OP_CORE_RSV_0x94, |
| IREE_VM_OP_CORE_RSV_0x95, |
| IREE_VM_OP_CORE_RSV_0x96, |
| IREE_VM_OP_CORE_RSV_0x97, |
| IREE_VM_OP_CORE_RSV_0x98, |
| IREE_VM_OP_CORE_RSV_0x99, |
| IREE_VM_OP_CORE_RSV_0x9A, |
| IREE_VM_OP_CORE_RSV_0x9B, |
| IREE_VM_OP_CORE_RSV_0x9C, |
| IREE_VM_OP_CORE_RSV_0x9D, |
| IREE_VM_OP_CORE_RSV_0x9E, |
| IREE_VM_OP_CORE_RSV_0x9F, |
| IREE_VM_OP_CORE_RSV_0xA0, |
| IREE_VM_OP_CORE_RSV_0xA1, |
| IREE_VM_OP_CORE_RSV_0xA2, |
| IREE_VM_OP_CORE_RSV_0xA3, |
| IREE_VM_OP_CORE_RSV_0xA4, |
| IREE_VM_OP_CORE_RSV_0xA5, |
| IREE_VM_OP_CORE_RSV_0xA6, |
| IREE_VM_OP_CORE_RSV_0xA7, |
| IREE_VM_OP_CORE_RSV_0xA8, |
| IREE_VM_OP_CORE_RSV_0xA9, |
| IREE_VM_OP_CORE_RSV_0xAA, |
| IREE_VM_OP_CORE_RSV_0xAB, |
| IREE_VM_OP_CORE_RSV_0xAC, |
| IREE_VM_OP_CORE_RSV_0xAD, |
| IREE_VM_OP_CORE_RSV_0xAE, |
| IREE_VM_OP_CORE_RSV_0xAF, |
| IREE_VM_OP_CORE_RSV_0xB0, |
| IREE_VM_OP_CORE_RSV_0xB1, |
| IREE_VM_OP_CORE_RSV_0xB2, |
| IREE_VM_OP_CORE_RSV_0xB3, |
| IREE_VM_OP_CORE_RSV_0xB4, |
| IREE_VM_OP_CORE_RSV_0xB5, |
| IREE_VM_OP_CORE_RSV_0xB6, |
| IREE_VM_OP_CORE_RSV_0xB7, |
| IREE_VM_OP_CORE_RSV_0xB8, |
| IREE_VM_OP_CORE_RSV_0xB9, |
| IREE_VM_OP_CORE_RSV_0xBA, |
| IREE_VM_OP_CORE_RSV_0xBB, |
| IREE_VM_OP_CORE_RSV_0xBC, |
| IREE_VM_OP_CORE_RSV_0xBD, |
| IREE_VM_OP_CORE_RSV_0xBE, |
| IREE_VM_OP_CORE_RSV_0xBF, |
| IREE_VM_OP_CORE_RSV_0xC0, |
| IREE_VM_OP_CORE_RSV_0xC1, |
| IREE_VM_OP_CORE_RSV_0xC2, |
| IREE_VM_OP_CORE_RSV_0xC3, |
| IREE_VM_OP_CORE_RSV_0xC4, |
| IREE_VM_OP_CORE_RSV_0xC5, |
| IREE_VM_OP_CORE_RSV_0xC6, |
| IREE_VM_OP_CORE_RSV_0xC7, |
| IREE_VM_OP_CORE_RSV_0xC8, |
| IREE_VM_OP_CORE_RSV_0xC9, |
| IREE_VM_OP_CORE_RSV_0xCA, |
| IREE_VM_OP_CORE_RSV_0xCB, |
| IREE_VM_OP_CORE_RSV_0xCC, |
| IREE_VM_OP_CORE_RSV_0xCD, |
| IREE_VM_OP_CORE_RSV_0xCE, |
| IREE_VM_OP_CORE_RSV_0xCF, |
| IREE_VM_OP_CORE_RSV_0xD0, |
| IREE_VM_OP_CORE_RSV_0xD1, |
| IREE_VM_OP_CORE_RSV_0xD2, |
| IREE_VM_OP_CORE_RSV_0xD3, |
| IREE_VM_OP_CORE_RSV_0xD4, |
| IREE_VM_OP_CORE_RSV_0xD5, |
| IREE_VM_OP_CORE_RSV_0xD6, |
| IREE_VM_OP_CORE_RSV_0xD7, |
| IREE_VM_OP_CORE_RSV_0xD8, |
| IREE_VM_OP_CORE_RSV_0xD9, |
| IREE_VM_OP_CORE_RSV_0xDA, |
| IREE_VM_OP_CORE_RSV_0xDB, |
| IREE_VM_OP_CORE_RSV_0xDC, |
| IREE_VM_OP_CORE_RSV_0xDD, |
| IREE_VM_OP_CORE_RSV_0xDE, |
| IREE_VM_OP_CORE_RSV_0xDF, |
| IREE_VM_OP_CORE_PrefixExtF32 = 0xE0, |
| IREE_VM_OP_CORE_PrefixExtF64 = 0xE1, |
| IREE_VM_OP_CORE_RSV_0xE2, |
| IREE_VM_OP_CORE_RSV_0xE3, |
| IREE_VM_OP_CORE_RSV_0xE4, |
| IREE_VM_OP_CORE_RSV_0xE5, |
| IREE_VM_OP_CORE_RSV_0xE6, |
| IREE_VM_OP_CORE_RSV_0xE7, |
| IREE_VM_OP_CORE_RSV_0xE8, |
| IREE_VM_OP_CORE_RSV_0xE9, |
| IREE_VM_OP_CORE_RSV_0xEA, |
| IREE_VM_OP_CORE_RSV_0xEB, |
| IREE_VM_OP_CORE_RSV_0xEC, |
| IREE_VM_OP_CORE_RSV_0xED, |
| IREE_VM_OP_CORE_RSV_0xEE, |
| IREE_VM_OP_CORE_RSV_0xEF, |
| IREE_VM_OP_CORE_RSV_0xF0, |
| IREE_VM_OP_CORE_RSV_0xF1, |
| IREE_VM_OP_CORE_RSV_0xF2, |
| IREE_VM_OP_CORE_RSV_0xF3, |
| IREE_VM_OP_CORE_RSV_0xF4, |
| IREE_VM_OP_CORE_RSV_0xF5, |
| IREE_VM_OP_CORE_RSV_0xF6, |
| IREE_VM_OP_CORE_RSV_0xF7, |
| IREE_VM_OP_CORE_RSV_0xF8, |
| IREE_VM_OP_CORE_RSV_0xF9, |
| IREE_VM_OP_CORE_RSV_0xFA, |
| IREE_VM_OP_CORE_RSV_0xFB, |
| IREE_VM_OP_CORE_RSV_0xFC, |
| IREE_VM_OP_CORE_RSV_0xFD, |
| IREE_VM_OP_CORE_RSV_0xFE, |
| IREE_VM_OP_CORE_RSV_0xFF, |
| } iree_vm_core_op_t; |
| |
| #define IREE_VM_OP_CORE_TABLE(OPC, RSV) \ |
| OPC(0x00, GlobalLoadI32) \ |
| OPC(0x01, GlobalStoreI32) \ |
| OPC(0x02, GlobalLoadIndirectI32) \ |
| OPC(0x03, GlobalStoreIndirectI32) \ |
| OPC(0x04, GlobalLoadI64) \ |
| OPC(0x05, GlobalStoreI64) \ |
| OPC(0x06, GlobalLoadIndirectI64) \ |
| OPC(0x07, GlobalStoreIndirectI64) \ |
| OPC(0x08, GlobalLoadRef) \ |
| OPC(0x09, GlobalStoreRef) \ |
| OPC(0x0A, GlobalLoadIndirectRef) \ |
| OPC(0x0B, GlobalStoreIndirectRef) \ |
| OPC(0x0C, ConstI32Zero) \ |
| OPC(0x0D, ConstI32) \ |
| OPC(0x0E, ConstI64Zero) \ |
| OPC(0x0F, ConstI64) \ |
| OPC(0x10, ConstRefZero) \ |
| OPC(0x11, ConstRefRodata) \ |
| OPC(0x12, ListAlloc) \ |
| OPC(0x13, ListReserve) \ |
| OPC(0x14, ListSize) \ |
| OPC(0x15, ListResize) \ |
| OPC(0x16, ListGetI32) \ |
| OPC(0x17, ListSetI32) \ |
| OPC(0x18, ListGetI64) \ |
| OPC(0x19, ListSetI64) \ |
| OPC(0x1A, ListGetRef) \ |
| OPC(0x1B, ListSetRef) \ |
| OPC(0x1C, SelectI32) \ |
| OPC(0x1D, SelectI64) \ |
| OPC(0x1E, SelectRef) \ |
| OPC(0x1F, SwitchI32) \ |
| OPC(0x20, SwitchI64) \ |
| OPC(0x21, SwitchRef) \ |
| OPC(0x22, AddI32) \ |
| OPC(0x23, SubI32) \ |
| OPC(0x24, MulI32) \ |
| OPC(0x25, DivI32S) \ |
| OPC(0x26, DivI32U) \ |
| OPC(0x27, RemI32S) \ |
| OPC(0x28, RemI32U) \ |
| OPC(0x29, FMAI32) \ |
| OPC(0x2A, AddI64) \ |
| OPC(0x2B, SubI64) \ |
| OPC(0x2C, MulI64) \ |
| OPC(0x2D, DivI64S) \ |
| OPC(0x2E, DivI64U) \ |
| OPC(0x2F, RemI64S) \ |
| OPC(0x30, RemI64U) \ |
| OPC(0x31, FMAI64) \ |
| OPC(0x32, NotI32) \ |
| OPC(0x33, AndI32) \ |
| OPC(0x34, OrI32) \ |
| OPC(0x35, XorI32) \ |
| OPC(0x36, NotI64) \ |
| OPC(0x37, AndI64) \ |
| OPC(0x38, OrI64) \ |
| OPC(0x39, XorI64) \ |
| OPC(0x3A, ShlI32) \ |
| OPC(0x3B, ShrI32S) \ |
| OPC(0x3C, ShrI32U) \ |
| OPC(0x3D, ShlI64) \ |
| OPC(0x3E, ShrI64S) \ |
| OPC(0x3F, ShrI64U) \ |
| OPC(0x40, TruncI32I8) \ |
| OPC(0x41, TruncI32I16) \ |
| OPC(0x42, TruncI64I32) \ |
| OPC(0x43, ExtI8I32S) \ |
| OPC(0x44, ExtI8I32U) \ |
| OPC(0x45, ExtI16I32S) \ |
| OPC(0x46, ExtI16I32U) \ |
| OPC(0x47, ExtI32I64S) \ |
| OPC(0x48, ExtI32I64U) \ |
| OPC(0x49, CmpEQI32) \ |
| OPC(0x4A, CmpNEI32) \ |
| OPC(0x4B, CmpLTI32S) \ |
| OPC(0x4C, CmpLTI32U) \ |
| OPC(0x4D, CmpNZI32) \ |
| OPC(0x4E, CmpEQI64) \ |
| OPC(0x4F, CmpNEI64) \ |
| OPC(0x50, CmpLTI64S) \ |
| OPC(0x51, CmpLTI64U) \ |
| OPC(0x52, CmpNZI64) \ |
| OPC(0x53, CmpEQRef) \ |
| OPC(0x54, CmpNERef) \ |
| OPC(0x55, CmpNZRef) \ |
| OPC(0x56, Branch) \ |
| OPC(0x57, CondBranch) \ |
| OPC(0x58, Call) \ |
| OPC(0x59, CallVariadic) \ |
| OPC(0x5A, Return) \ |
| OPC(0x5B, Fail) \ |
| OPC(0x5C, ImportResolved) \ |
| OPC(0x5D, Yield) \ |
| OPC(0x5E, Trace) \ |
| OPC(0x5F, Print) \ |
| OPC(0x60, CondBreak) \ |
| OPC(0x61, Break) \ |
| OPC(0x62, BufferLoadI8U) \ |
| OPC(0x63, BufferLoadI8S) \ |
| OPC(0x64, BufferLoadI16U) \ |
| OPC(0x65, BufferLoadI16S) \ |
| OPC(0x66, BufferLoadI32) \ |
| OPC(0x67, BufferLoadI64) \ |
| OPC(0x68, BufferStoreI8) \ |
| OPC(0x69, BufferStoreI16) \ |
| OPC(0x6A, BufferStoreI32) \ |
| OPC(0x6B, BufferStoreI64) \ |
| OPC(0x6C, BufferAlloc) \ |
| OPC(0x6D, BufferClone) \ |
| OPC(0x6E, BufferLength) \ |
| OPC(0x6F, BufferCopy) \ |
| OPC(0x70, BufferCompare) \ |
| OPC(0x71, BufferFillI8) \ |
| OPC(0x72, BufferFillI16) \ |
| OPC(0x73, BufferFillI32) \ |
| OPC(0x74, BufferFillI64) \ |
| OPC(0x75, CtlzI32) \ |
| OPC(0x76, CtlzI64) \ |
| OPC(0x77, AbsI32) \ |
| OPC(0x78, AbsI64) \ |
| RSV(0x79) \ |
| RSV(0x7A) \ |
| RSV(0x7B) \ |
| RSV(0x7C) \ |
| RSV(0x7D) \ |
| RSV(0x7E) \ |
| RSV(0x7F) \ |
| RSV(0x80) \ |
| RSV(0x81) \ |
| RSV(0x82) \ |
| RSV(0x83) \ |
| RSV(0x84) \ |
| RSV(0x85) \ |
| RSV(0x86) \ |
| RSV(0x87) \ |
| RSV(0x88) \ |
| RSV(0x89) \ |
| RSV(0x8A) \ |
| RSV(0x8B) \ |
| RSV(0x8C) \ |
| RSV(0x8D) \ |
| RSV(0x8E) \ |
| RSV(0x8F) \ |
| RSV(0x90) \ |
| RSV(0x91) \ |
| RSV(0x92) \ |
| RSV(0x93) \ |
| RSV(0x94) \ |
| RSV(0x95) \ |
| RSV(0x96) \ |
| RSV(0x97) \ |
| RSV(0x98) \ |
| RSV(0x99) \ |
| RSV(0x9A) \ |
| RSV(0x9B) \ |
| RSV(0x9C) \ |
| RSV(0x9D) \ |
| RSV(0x9E) \ |
| RSV(0x9F) \ |
| RSV(0xA0) \ |
| RSV(0xA1) \ |
| RSV(0xA2) \ |
| RSV(0xA3) \ |
| RSV(0xA4) \ |
| RSV(0xA5) \ |
| RSV(0xA6) \ |
| RSV(0xA7) \ |
| RSV(0xA8) \ |
| RSV(0xA9) \ |
| RSV(0xAA) \ |
| RSV(0xAB) \ |
| RSV(0xAC) \ |
| RSV(0xAD) \ |
| RSV(0xAE) \ |
| RSV(0xAF) \ |
| RSV(0xB0) \ |
| RSV(0xB1) \ |
| RSV(0xB2) \ |
| RSV(0xB3) \ |
| RSV(0xB4) \ |
| RSV(0xB5) \ |
| RSV(0xB6) \ |
| RSV(0xB7) \ |
| RSV(0xB8) \ |
| RSV(0xB9) \ |
| RSV(0xBA) \ |
| RSV(0xBB) \ |
| RSV(0xBC) \ |
| RSV(0xBD) \ |
| RSV(0xBE) \ |
| RSV(0xBF) \ |
| RSV(0xC0) \ |
| RSV(0xC1) \ |
| RSV(0xC2) \ |
| RSV(0xC3) \ |
| RSV(0xC4) \ |
| RSV(0xC5) \ |
| RSV(0xC6) \ |
| RSV(0xC7) \ |
| RSV(0xC8) \ |
| RSV(0xC9) \ |
| RSV(0xCA) \ |
| RSV(0xCB) \ |
| RSV(0xCC) \ |
| RSV(0xCD) \ |
| RSV(0xCE) \ |
| RSV(0xCF) \ |
| RSV(0xD0) \ |
| RSV(0xD1) \ |
| RSV(0xD2) \ |
| RSV(0xD3) \ |
| RSV(0xD4) \ |
| RSV(0xD5) \ |
| RSV(0xD6) \ |
| RSV(0xD7) \ |
| RSV(0xD8) \ |
| RSV(0xD9) \ |
| RSV(0xDA) \ |
| RSV(0xDB) \ |
| RSV(0xDC) \ |
| RSV(0xDD) \ |
| RSV(0xDE) \ |
| RSV(0xDF) \ |
| OPC(0xE0, PrefixExtF32) \ |
| OPC(0xE1, PrefixExtF64) \ |
| RSV(0xE2) \ |
| RSV(0xE3) \ |
| RSV(0xE4) \ |
| RSV(0xE5) \ |
| RSV(0xE6) \ |
| RSV(0xE7) \ |
| RSV(0xE8) \ |
| RSV(0xE9) \ |
| RSV(0xEA) \ |
| RSV(0xEB) \ |
| RSV(0xEC) \ |
| RSV(0xED) \ |
| RSV(0xEE) \ |
| RSV(0xEF) \ |
| RSV(0xF0) \ |
| RSV(0xF1) \ |
| RSV(0xF2) \ |
| RSV(0xF3) \ |
| RSV(0xF4) \ |
| RSV(0xF5) \ |
| RSV(0xF6) \ |
| RSV(0xF7) \ |
| RSV(0xF8) \ |
| RSV(0xF9) \ |
| RSV(0xFA) \ |
| RSV(0xFB) \ |
| RSV(0xFC) \ |
| RSV(0xFD) \ |
| RSV(0xFE) \ |
| RSV(0xFF) |
| |
| typedef enum { |
| IREE_VM_OP_EXT_F32_GlobalLoadF32 = 0x00, |
| IREE_VM_OP_EXT_F32_GlobalStoreF32 = 0x01, |
| IREE_VM_OP_EXT_F32_GlobalLoadIndirectF32 = 0x02, |
| IREE_VM_OP_EXT_F32_GlobalStoreIndirectF32 = 0x03, |
| IREE_VM_OP_EXT_F32_ConstF32Zero = 0x04, |
| IREE_VM_OP_EXT_F32_ConstF32 = 0x05, |
| IREE_VM_OP_EXT_F32_ListGetF32 = 0x06, |
| IREE_VM_OP_EXT_F32_ListSetF32 = 0x07, |
| IREE_VM_OP_EXT_F32_SelectF32 = 0x08, |
| IREE_VM_OP_EXT_F32_SwitchF32 = 0x09, |
| IREE_VM_OP_EXT_F32_AddF32 = 0x0A, |
| IREE_VM_OP_EXT_F32_SubF32 = 0x0B, |
| IREE_VM_OP_EXT_F32_MulF32 = 0x0C, |
| IREE_VM_OP_EXT_F32_DivF32 = 0x0D, |
| IREE_VM_OP_EXT_F32_RemF32 = 0x0E, |
| IREE_VM_OP_EXT_F32_FMAF32 = 0x0F, |
| IREE_VM_OP_EXT_F32_AbsF32 = 0x10, |
| IREE_VM_OP_EXT_F32_NegF32 = 0x11, |
| IREE_VM_OP_EXT_F32_CeilF32 = 0x12, |
| IREE_VM_OP_EXT_F32_FloorF32 = 0x13, |
| IREE_VM_OP_EXT_F32_CastSI32F32 = 0x14, |
| IREE_VM_OP_EXT_F32_CastUI32F32 = 0x15, |
| IREE_VM_OP_EXT_F32_CastF32SI32 = 0x16, |
| IREE_VM_OP_EXT_F32_CastF32UI32 = 0x17, |
| IREE_VM_OP_EXT_F32_BitcastI32F32 = 0x18, |
| IREE_VM_OP_EXT_F32_BitcastF32I32 = 0x19, |
| IREE_VM_OP_EXT_F32_AtanF32 = 0x1A, |
| IREE_VM_OP_EXT_F32_Atan2F32 = 0x1B, |
| IREE_VM_OP_EXT_F32_CosF32 = 0x1C, |
| IREE_VM_OP_EXT_F32_SinF32 = 0x1D, |
| IREE_VM_OP_EXT_F32_ExpF32 = 0x1E, |
| IREE_VM_OP_EXT_F32_Exp2F32 = 0x1F, |
| IREE_VM_OP_EXT_F32_ExpM1F32 = 0x20, |
| IREE_VM_OP_EXT_F32_LogF32 = 0x21, |
| IREE_VM_OP_EXT_F32_Log10F32 = 0x22, |
| IREE_VM_OP_EXT_F32_Log1pF32 = 0x23, |
| IREE_VM_OP_EXT_F32_Log2F32 = 0x24, |
| IREE_VM_OP_EXT_F32_PowF32 = 0x25, |
| IREE_VM_OP_EXT_F32_RsqrtF32 = 0x26, |
| IREE_VM_OP_EXT_F32_SqrtF32 = 0x27, |
| IREE_VM_OP_EXT_F32_TanhF32 = 0x28, |
| IREE_VM_OP_EXT_F32_ErfF32 = 0x29, |
| IREE_VM_OP_EXT_F32_CmpEQF32O = 0x2A, |
| IREE_VM_OP_EXT_F32_CmpEQF32U = 0x2B, |
| IREE_VM_OP_EXT_F32_CmpNEF32O = 0x2C, |
| IREE_VM_OP_EXT_F32_CmpNEF32U = 0x2D, |
| IREE_VM_OP_EXT_F32_CmpLTF32O = 0x2E, |
| IREE_VM_OP_EXT_F32_CmpLTF32U = 0x2F, |
| IREE_VM_OP_EXT_F32_CmpLTEF32O = 0x30, |
| IREE_VM_OP_EXT_F32_CmpLTEF32U = 0x31, |
| IREE_VM_OP_EXT_F32_CmpNaNF32 = 0x32, |
| IREE_VM_OP_EXT_F32_BufferLoadF32 = 0x33, |
| IREE_VM_OP_EXT_F32_BufferStoreF32 = 0x34, |
| IREE_VM_OP_EXT_F32_BufferFillF32 = 0x35, |
| IREE_VM_OP_EXT_F32_RoundF32 = 0x36, |
| IREE_VM_OP_EXT_F32_RSV_0x37, |
| IREE_VM_OP_EXT_F32_RSV_0x38, |
| IREE_VM_OP_EXT_F32_RSV_0x39, |
| IREE_VM_OP_EXT_F32_RSV_0x3A, |
| IREE_VM_OP_EXT_F32_RSV_0x3B, |
| IREE_VM_OP_EXT_F32_RSV_0x3C, |
| IREE_VM_OP_EXT_F32_RSV_0x3D, |
| IREE_VM_OP_EXT_F32_RSV_0x3E, |
| IREE_VM_OP_EXT_F32_RSV_0x3F, |
| IREE_VM_OP_EXT_F32_RSV_0x40, |
| IREE_VM_OP_EXT_F32_RSV_0x41, |
| IREE_VM_OP_EXT_F32_RSV_0x42, |
| IREE_VM_OP_EXT_F32_RSV_0x43, |
| IREE_VM_OP_EXT_F32_RSV_0x44, |
| IREE_VM_OP_EXT_F32_RSV_0x45, |
| IREE_VM_OP_EXT_F32_RSV_0x46, |
| IREE_VM_OP_EXT_F32_RSV_0x47, |
| IREE_VM_OP_EXT_F32_RSV_0x48, |
| IREE_VM_OP_EXT_F32_RSV_0x49, |
| IREE_VM_OP_EXT_F32_RSV_0x4A, |
| IREE_VM_OP_EXT_F32_RSV_0x4B, |
| IREE_VM_OP_EXT_F32_RSV_0x4C, |
| IREE_VM_OP_EXT_F32_RSV_0x4D, |
| IREE_VM_OP_EXT_F32_RSV_0x4E, |
| IREE_VM_OP_EXT_F32_RSV_0x4F, |
| IREE_VM_OP_EXT_F32_RSV_0x50, |
| IREE_VM_OP_EXT_F32_RSV_0x51, |
| IREE_VM_OP_EXT_F32_RSV_0x52, |
| IREE_VM_OP_EXT_F32_RSV_0x53, |
| IREE_VM_OP_EXT_F32_RSV_0x54, |
| IREE_VM_OP_EXT_F32_RSV_0x55, |
| IREE_VM_OP_EXT_F32_RSV_0x56, |
| IREE_VM_OP_EXT_F32_RSV_0x57, |
| IREE_VM_OP_EXT_F32_RSV_0x58, |
| IREE_VM_OP_EXT_F32_RSV_0x59, |
| IREE_VM_OP_EXT_F32_RSV_0x5A, |
| IREE_VM_OP_EXT_F32_RSV_0x5B, |
| IREE_VM_OP_EXT_F32_RSV_0x5C, |
| IREE_VM_OP_EXT_F32_RSV_0x5D, |
| IREE_VM_OP_EXT_F32_RSV_0x5E, |
| IREE_VM_OP_EXT_F32_RSV_0x5F, |
| IREE_VM_OP_EXT_F32_RSV_0x60, |
| IREE_VM_OP_EXT_F32_RSV_0x61, |
| IREE_VM_OP_EXT_F32_RSV_0x62, |
| IREE_VM_OP_EXT_F32_RSV_0x63, |
| IREE_VM_OP_EXT_F32_RSV_0x64, |
| IREE_VM_OP_EXT_F32_RSV_0x65, |
| IREE_VM_OP_EXT_F32_RSV_0x66, |
| IREE_VM_OP_EXT_F32_RSV_0x67, |
| IREE_VM_OP_EXT_F32_RSV_0x68, |
| IREE_VM_OP_EXT_F32_RSV_0x69, |
| IREE_VM_OP_EXT_F32_RSV_0x6A, |
| IREE_VM_OP_EXT_F32_RSV_0x6B, |
| IREE_VM_OP_EXT_F32_RSV_0x6C, |
| IREE_VM_OP_EXT_F32_RSV_0x6D, |
| IREE_VM_OP_EXT_F32_RSV_0x6E, |
| IREE_VM_OP_EXT_F32_RSV_0x6F, |
| IREE_VM_OP_EXT_F32_RSV_0x70, |
| IREE_VM_OP_EXT_F32_RSV_0x71, |
| IREE_VM_OP_EXT_F32_RSV_0x72, |
| IREE_VM_OP_EXT_F32_RSV_0x73, |
| IREE_VM_OP_EXT_F32_RSV_0x74, |
| IREE_VM_OP_EXT_F32_RSV_0x75, |
| IREE_VM_OP_EXT_F32_RSV_0x76, |
| IREE_VM_OP_EXT_F32_RSV_0x77, |
| IREE_VM_OP_EXT_F32_RSV_0x78, |
| IREE_VM_OP_EXT_F32_RSV_0x79, |
| IREE_VM_OP_EXT_F32_RSV_0x7A, |
| IREE_VM_OP_EXT_F32_RSV_0x7B, |
| IREE_VM_OP_EXT_F32_RSV_0x7C, |
| IREE_VM_OP_EXT_F32_RSV_0x7D, |
| IREE_VM_OP_EXT_F32_RSV_0x7E, |
| IREE_VM_OP_EXT_F32_RSV_0x7F, |
| IREE_VM_OP_EXT_F32_RSV_0x80, |
| IREE_VM_OP_EXT_F32_RSV_0x81, |
| IREE_VM_OP_EXT_F32_RSV_0x82, |
| IREE_VM_OP_EXT_F32_RSV_0x83, |
| IREE_VM_OP_EXT_F32_RSV_0x84, |
| IREE_VM_OP_EXT_F32_RSV_0x85, |
| IREE_VM_OP_EXT_F32_RSV_0x86, |
| IREE_VM_OP_EXT_F32_RSV_0x87, |
| IREE_VM_OP_EXT_F32_RSV_0x88, |
| IREE_VM_OP_EXT_F32_RSV_0x89, |
| IREE_VM_OP_EXT_F32_RSV_0x8A, |
| IREE_VM_OP_EXT_F32_RSV_0x8B, |
| IREE_VM_OP_EXT_F32_RSV_0x8C, |
| IREE_VM_OP_EXT_F32_RSV_0x8D, |
| IREE_VM_OP_EXT_F32_RSV_0x8E, |
| IREE_VM_OP_EXT_F32_RSV_0x8F, |
| IREE_VM_OP_EXT_F32_RSV_0x90, |
| IREE_VM_OP_EXT_F32_RSV_0x91, |
| IREE_VM_OP_EXT_F32_RSV_0x92, |
| IREE_VM_OP_EXT_F32_RSV_0x93, |
| IREE_VM_OP_EXT_F32_RSV_0x94, |
| IREE_VM_OP_EXT_F32_RSV_0x95, |
| IREE_VM_OP_EXT_F32_RSV_0x96, |
| IREE_VM_OP_EXT_F32_RSV_0x97, |
| IREE_VM_OP_EXT_F32_RSV_0x98, |
| IREE_VM_OP_EXT_F32_RSV_0x99, |
| IREE_VM_OP_EXT_F32_RSV_0x9A, |
| IREE_VM_OP_EXT_F32_RSV_0x9B, |
| IREE_VM_OP_EXT_F32_RSV_0x9C, |
| IREE_VM_OP_EXT_F32_RSV_0x9D, |
| IREE_VM_OP_EXT_F32_RSV_0x9E, |
| IREE_VM_OP_EXT_F32_RSV_0x9F, |
| IREE_VM_OP_EXT_F32_RSV_0xA0, |
| IREE_VM_OP_EXT_F32_RSV_0xA1, |
| IREE_VM_OP_EXT_F32_RSV_0xA2, |
| IREE_VM_OP_EXT_F32_RSV_0xA3, |
| IREE_VM_OP_EXT_F32_RSV_0xA4, |
| IREE_VM_OP_EXT_F32_RSV_0xA5, |
| IREE_VM_OP_EXT_F32_RSV_0xA6, |
| IREE_VM_OP_EXT_F32_RSV_0xA7, |
| IREE_VM_OP_EXT_F32_RSV_0xA8, |
| IREE_VM_OP_EXT_F32_RSV_0xA9, |
| IREE_VM_OP_EXT_F32_RSV_0xAA, |
| IREE_VM_OP_EXT_F32_RSV_0xAB, |
| IREE_VM_OP_EXT_F32_RSV_0xAC, |
| IREE_VM_OP_EXT_F32_RSV_0xAD, |
| IREE_VM_OP_EXT_F32_RSV_0xAE, |
| IREE_VM_OP_EXT_F32_RSV_0xAF, |
| IREE_VM_OP_EXT_F32_RSV_0xB0, |
| IREE_VM_OP_EXT_F32_RSV_0xB1, |
| IREE_VM_OP_EXT_F32_RSV_0xB2, |
| IREE_VM_OP_EXT_F32_RSV_0xB3, |
| IREE_VM_OP_EXT_F32_RSV_0xB4, |
| IREE_VM_OP_EXT_F32_RSV_0xB5, |
| IREE_VM_OP_EXT_F32_RSV_0xB6, |
| IREE_VM_OP_EXT_F32_RSV_0xB7, |
| IREE_VM_OP_EXT_F32_RSV_0xB8, |
| IREE_VM_OP_EXT_F32_RSV_0xB9, |
| IREE_VM_OP_EXT_F32_RSV_0xBA, |
| IREE_VM_OP_EXT_F32_RSV_0xBB, |
| IREE_VM_OP_EXT_F32_RSV_0xBC, |
| IREE_VM_OP_EXT_F32_RSV_0xBD, |
| IREE_VM_OP_EXT_F32_RSV_0xBE, |
| IREE_VM_OP_EXT_F32_RSV_0xBF, |
| IREE_VM_OP_EXT_F32_RSV_0xC0, |
| IREE_VM_OP_EXT_F32_RSV_0xC1, |
| IREE_VM_OP_EXT_F32_RSV_0xC2, |
| IREE_VM_OP_EXT_F32_RSV_0xC3, |
| IREE_VM_OP_EXT_F32_RSV_0xC4, |
| IREE_VM_OP_EXT_F32_RSV_0xC5, |
| IREE_VM_OP_EXT_F32_RSV_0xC6, |
| IREE_VM_OP_EXT_F32_RSV_0xC7, |
| IREE_VM_OP_EXT_F32_RSV_0xC8, |
| IREE_VM_OP_EXT_F32_RSV_0xC9, |
| IREE_VM_OP_EXT_F32_RSV_0xCA, |
| IREE_VM_OP_EXT_F32_RSV_0xCB, |
| IREE_VM_OP_EXT_F32_RSV_0xCC, |
| IREE_VM_OP_EXT_F32_RSV_0xCD, |
| IREE_VM_OP_EXT_F32_RSV_0xCE, |
| IREE_VM_OP_EXT_F32_RSV_0xCF, |
| IREE_VM_OP_EXT_F32_RSV_0xD0, |
| IREE_VM_OP_EXT_F32_RSV_0xD1, |
| IREE_VM_OP_EXT_F32_RSV_0xD2, |
| IREE_VM_OP_EXT_F32_RSV_0xD3, |
| IREE_VM_OP_EXT_F32_RSV_0xD4, |
| IREE_VM_OP_EXT_F32_RSV_0xD5, |
| IREE_VM_OP_EXT_F32_RSV_0xD6, |
| IREE_VM_OP_EXT_F32_RSV_0xD7, |
| IREE_VM_OP_EXT_F32_RSV_0xD8, |
| IREE_VM_OP_EXT_F32_RSV_0xD9, |
| IREE_VM_OP_EXT_F32_RSV_0xDA, |
| IREE_VM_OP_EXT_F32_RSV_0xDB, |
| IREE_VM_OP_EXT_F32_RSV_0xDC, |
| IREE_VM_OP_EXT_F32_RSV_0xDD, |
| IREE_VM_OP_EXT_F32_RSV_0xDE, |
| IREE_VM_OP_EXT_F32_RSV_0xDF, |
| IREE_VM_OP_EXT_F32_RSV_0xE0, |
| IREE_VM_OP_EXT_F32_RSV_0xE1, |
| IREE_VM_OP_EXT_F32_RSV_0xE2, |
| IREE_VM_OP_EXT_F32_RSV_0xE3, |
| IREE_VM_OP_EXT_F32_RSV_0xE4, |
| IREE_VM_OP_EXT_F32_RSV_0xE5, |
| IREE_VM_OP_EXT_F32_RSV_0xE6, |
| IREE_VM_OP_EXT_F32_RSV_0xE7, |
| IREE_VM_OP_EXT_F32_RSV_0xE8, |
| IREE_VM_OP_EXT_F32_RSV_0xE9, |
| IREE_VM_OP_EXT_F32_RSV_0xEA, |
| IREE_VM_OP_EXT_F32_RSV_0xEB, |
| IREE_VM_OP_EXT_F32_RSV_0xEC, |
| IREE_VM_OP_EXT_F32_RSV_0xED, |
| IREE_VM_OP_EXT_F32_RSV_0xEE, |
| IREE_VM_OP_EXT_F32_RSV_0xEF, |
| IREE_VM_OP_EXT_F32_RSV_0xF0, |
| IREE_VM_OP_EXT_F32_RSV_0xF1, |
| IREE_VM_OP_EXT_F32_RSV_0xF2, |
| IREE_VM_OP_EXT_F32_RSV_0xF3, |
| IREE_VM_OP_EXT_F32_RSV_0xF4, |
| IREE_VM_OP_EXT_F32_RSV_0xF5, |
| IREE_VM_OP_EXT_F32_RSV_0xF6, |
| IREE_VM_OP_EXT_F32_RSV_0xF7, |
| IREE_VM_OP_EXT_F32_RSV_0xF8, |
| IREE_VM_OP_EXT_F32_RSV_0xF9, |
| IREE_VM_OP_EXT_F32_RSV_0xFA, |
| IREE_VM_OP_EXT_F32_RSV_0xFB, |
| IREE_VM_OP_EXT_F32_RSV_0xFC, |
| IREE_VM_OP_EXT_F32_RSV_0xFD, |
| IREE_VM_OP_EXT_F32_RSV_0xFE, |
| IREE_VM_OP_EXT_F32_RSV_0xFF, |
| } iree_vm_ext_f32_op_t; |
| |
| #define IREE_VM_OP_EXT_F32_TABLE(OPC, RSV) \ |
| OPC(0x00, GlobalLoadF32) \ |
| OPC(0x01, GlobalStoreF32) \ |
| OPC(0x02, GlobalLoadIndirectF32) \ |
| OPC(0x03, GlobalStoreIndirectF32) \ |
| OPC(0x04, ConstF32Zero) \ |
| OPC(0x05, ConstF32) \ |
| OPC(0x06, ListGetF32) \ |
| OPC(0x07, ListSetF32) \ |
| OPC(0x08, SelectF32) \ |
| OPC(0x09, SwitchF32) \ |
| OPC(0x0A, AddF32) \ |
| OPC(0x0B, SubF32) \ |
| OPC(0x0C, MulF32) \ |
| OPC(0x0D, DivF32) \ |
| OPC(0x0E, RemF32) \ |
| OPC(0x0F, FMAF32) \ |
| OPC(0x10, AbsF32) \ |
| OPC(0x11, NegF32) \ |
| OPC(0x12, CeilF32) \ |
| OPC(0x13, FloorF32) \ |
| OPC(0x14, CastSI32F32) \ |
| OPC(0x15, CastUI32F32) \ |
| OPC(0x16, CastF32SI32) \ |
| OPC(0x17, CastF32UI32) \ |
| OPC(0x18, BitcastI32F32) \ |
| OPC(0x19, BitcastF32I32) \ |
| OPC(0x1A, AtanF32) \ |
| OPC(0x1B, Atan2F32) \ |
| OPC(0x1C, CosF32) \ |
| OPC(0x1D, SinF32) \ |
| OPC(0x1E, ExpF32) \ |
| OPC(0x1F, Exp2F32) \ |
| OPC(0x20, ExpM1F32) \ |
| OPC(0x21, LogF32) \ |
| OPC(0x22, Log10F32) \ |
| OPC(0x23, Log1pF32) \ |
| OPC(0x24, Log2F32) \ |
| OPC(0x25, PowF32) \ |
| OPC(0x26, RsqrtF32) \ |
| OPC(0x27, SqrtF32) \ |
| OPC(0x28, TanhF32) \ |
| OPC(0x29, ErfF32) \ |
| OPC(0x2A, CmpEQF32O) \ |
| OPC(0x2B, CmpEQF32U) \ |
| OPC(0x2C, CmpNEF32O) \ |
| OPC(0x2D, CmpNEF32U) \ |
| OPC(0x2E, CmpLTF32O) \ |
| OPC(0x2F, CmpLTF32U) \ |
| OPC(0x30, CmpLTEF32O) \ |
| OPC(0x31, CmpLTEF32U) \ |
| OPC(0x32, CmpNaNF32) \ |
| OPC(0x33, BufferLoadF32) \ |
| OPC(0x34, BufferStoreF32) \ |
| OPC(0x35, BufferFillF32) \ |
| OPC(0x36, RoundF32) \ |
| RSV(0x37) \ |
| RSV(0x38) \ |
| RSV(0x39) \ |
| RSV(0x3A) \ |
| RSV(0x3B) \ |
| RSV(0x3C) \ |
| RSV(0x3D) \ |
| RSV(0x3E) \ |
| RSV(0x3F) \ |
| RSV(0x40) \ |
| RSV(0x41) \ |
| RSV(0x42) \ |
| RSV(0x43) \ |
| RSV(0x44) \ |
| RSV(0x45) \ |
| RSV(0x46) \ |
| RSV(0x47) \ |
| RSV(0x48) \ |
| RSV(0x49) \ |
| RSV(0x4A) \ |
| RSV(0x4B) \ |
| RSV(0x4C) \ |
| RSV(0x4D) \ |
| RSV(0x4E) \ |
| RSV(0x4F) \ |
| RSV(0x50) \ |
| RSV(0x51) \ |
| RSV(0x52) \ |
| RSV(0x53) \ |
| RSV(0x54) \ |
| RSV(0x55) \ |
| RSV(0x56) \ |
| RSV(0x57) \ |
| RSV(0x58) \ |
| RSV(0x59) \ |
| RSV(0x5A) \ |
| RSV(0x5B) \ |
| RSV(0x5C) \ |
| RSV(0x5D) \ |
| RSV(0x5E) \ |
| RSV(0x5F) \ |
| RSV(0x60) \ |
| RSV(0x61) \ |
| RSV(0x62) \ |
| RSV(0x63) \ |
| RSV(0x64) \ |
| RSV(0x65) \ |
| RSV(0x66) \ |
| RSV(0x67) \ |
| RSV(0x68) \ |
| RSV(0x69) \ |
| RSV(0x6A) \ |
| RSV(0x6B) \ |
| RSV(0x6C) \ |
| RSV(0x6D) \ |
| RSV(0x6E) \ |
| RSV(0x6F) \ |
| RSV(0x70) \ |
| RSV(0x71) \ |
| RSV(0x72) \ |
| RSV(0x73) \ |
| RSV(0x74) \ |
| RSV(0x75) \ |
| RSV(0x76) \ |
| RSV(0x77) \ |
| RSV(0x78) \ |
| RSV(0x79) \ |
| RSV(0x7A) \ |
| RSV(0x7B) \ |
| RSV(0x7C) \ |
| RSV(0x7D) \ |
| RSV(0x7E) \ |
| RSV(0x7F) \ |
| RSV(0x80) \ |
| RSV(0x81) \ |
| RSV(0x82) \ |
| RSV(0x83) \ |
| RSV(0x84) \ |
| RSV(0x85) \ |
| RSV(0x86) \ |
| RSV(0x87) \ |
| RSV(0x88) \ |
| RSV(0x89) \ |
| RSV(0x8A) \ |
| RSV(0x8B) \ |
| RSV(0x8C) \ |
| RSV(0x8D) \ |
| RSV(0x8E) \ |
| RSV(0x8F) \ |
| RSV(0x90) \ |
| RSV(0x91) \ |
| RSV(0x92) \ |
| RSV(0x93) \ |
| RSV(0x94) \ |
| RSV(0x95) \ |
| RSV(0x96) \ |
| RSV(0x97) \ |
| RSV(0x98) \ |
| RSV(0x99) \ |
| RSV(0x9A) \ |
| RSV(0x9B) \ |
| RSV(0x9C) \ |
| RSV(0x9D) \ |
| RSV(0x9E) \ |
| RSV(0x9F) \ |
| RSV(0xA0) \ |
| RSV(0xA1) \ |
| RSV(0xA2) \ |
| RSV(0xA3) \ |
| RSV(0xA4) \ |
| RSV(0xA5) \ |
| RSV(0xA6) \ |
| RSV(0xA7) \ |
| RSV(0xA8) \ |
| RSV(0xA9) \ |
| RSV(0xAA) \ |
| RSV(0xAB) \ |
| RSV(0xAC) \ |
| RSV(0xAD) \ |
| RSV(0xAE) \ |
| RSV(0xAF) \ |
| RSV(0xB0) \ |
| RSV(0xB1) \ |
| RSV(0xB2) \ |
| RSV(0xB3) \ |
| RSV(0xB4) \ |
| RSV(0xB5) \ |
| RSV(0xB6) \ |
| RSV(0xB7) \ |
| RSV(0xB8) \ |
| RSV(0xB9) \ |
| RSV(0xBA) \ |
| RSV(0xBB) \ |
| RSV(0xBC) \ |
| RSV(0xBD) \ |
| RSV(0xBE) \ |
| RSV(0xBF) \ |
| RSV(0xC0) \ |
| RSV(0xC1) \ |
| RSV(0xC2) \ |
| RSV(0xC3) \ |
| RSV(0xC4) \ |
| RSV(0xC5) \ |
| RSV(0xC6) \ |
| RSV(0xC7) \ |
| RSV(0xC8) \ |
| RSV(0xC9) \ |
| RSV(0xCA) \ |
| RSV(0xCB) \ |
| RSV(0xCC) \ |
| RSV(0xCD) \ |
| RSV(0xCE) \ |
| RSV(0xCF) \ |
| RSV(0xD0) \ |
| RSV(0xD1) \ |
| RSV(0xD2) \ |
| RSV(0xD3) \ |
| RSV(0xD4) \ |
| RSV(0xD5) \ |
| RSV(0xD6) \ |
| RSV(0xD7) \ |
| RSV(0xD8) \ |
| RSV(0xD9) \ |
| RSV(0xDA) \ |
| RSV(0xDB) \ |
| RSV(0xDC) \ |
| RSV(0xDD) \ |
| RSV(0xDE) \ |
| RSV(0xDF) \ |
| RSV(0xE0) \ |
| RSV(0xE1) \ |
| RSV(0xE2) \ |
| RSV(0xE3) \ |
| RSV(0xE4) \ |
| RSV(0xE5) \ |
| RSV(0xE6) \ |
| RSV(0xE7) \ |
| RSV(0xE8) \ |
| RSV(0xE9) \ |
| RSV(0xEA) \ |
| RSV(0xEB) \ |
| RSV(0xEC) \ |
| RSV(0xED) \ |
| RSV(0xEE) \ |
| RSV(0xEF) \ |
| RSV(0xF0) \ |
| RSV(0xF1) \ |
| RSV(0xF2) \ |
| RSV(0xF3) \ |
| RSV(0xF4) \ |
| RSV(0xF5) \ |
| RSV(0xF6) \ |
| RSV(0xF7) \ |
| RSV(0xF8) \ |
| RSV(0xF9) \ |
| RSV(0xFA) \ |
| RSV(0xFB) \ |
| RSV(0xFC) \ |
| RSV(0xFD) \ |
| RSV(0xFE) \ |
| RSV(0xFF) |
| |
| typedef enum { |
| IREE_VM_OP_EXT_F64_GlobalLoadF64 = 0x00, |
| IREE_VM_OP_EXT_F64_GlobalStoreF64 = 0x01, |
| IREE_VM_OP_EXT_F64_GlobalLoadIndirectF64 = 0x02, |
| IREE_VM_OP_EXT_F64_GlobalStoreIndirectF64 = 0x03, |
| IREE_VM_OP_EXT_F64_ConstF64Zero = 0x04, |
| IREE_VM_OP_EXT_F64_ConstF64 = 0x05, |
| IREE_VM_OP_EXT_F64_ListGetF64 = 0x06, |
| IREE_VM_OP_EXT_F64_ListSetF64 = 0x07, |
| IREE_VM_OP_EXT_F64_SelectF64 = 0x08, |
| IREE_VM_OP_EXT_F64_SwitchF64 = 0x09, |
| IREE_VM_OP_EXT_F64_AddF64 = 0x0A, |
| IREE_VM_OP_EXT_F64_SubF64 = 0x0B, |
| IREE_VM_OP_EXT_F64_MulF64 = 0x0C, |
| IREE_VM_OP_EXT_F64_DivF64 = 0x0D, |
| IREE_VM_OP_EXT_F64_RemF64 = 0x0E, |
| IREE_VM_OP_EXT_F64_FMAF64 = 0x0F, |
| IREE_VM_OP_EXT_F64_AbsF64 = 0x10, |
| IREE_VM_OP_EXT_F64_NegF64 = 0x11, |
| IREE_VM_OP_EXT_F64_CeilF64 = 0x12, |
| IREE_VM_OP_EXT_F64_FloorF64 = 0x13, |
| IREE_VM_OP_EXT_F64_TruncF64F32 = 0x14, |
| IREE_VM_OP_EXT_F64_ExtF32F64 = 0x15, |
| IREE_VM_OP_EXT_F64_CastSI32F64 = 0x16, |
| IREE_VM_OP_EXT_F64_CastUI32F64 = 0x17, |
| IREE_VM_OP_EXT_F64_CastF64SI32 = 0x18, |
| IREE_VM_OP_EXT_F64_CastF64UI32 = 0x19, |
| IREE_VM_OP_EXT_F64_CastSI64F64 = 0x1A, |
| IREE_VM_OP_EXT_F64_CastUI64F64 = 0x1B, |
| IREE_VM_OP_EXT_F64_CastF64SI64 = 0x1C, |
| IREE_VM_OP_EXT_F64_CastF64UI64 = 0x1D, |
| IREE_VM_OP_EXT_F64_BitcastI64F64 = 0x1E, |
| IREE_VM_OP_EXT_F64_BitcastF64I64 = 0x1F, |
| IREE_VM_OP_EXT_F64_AtanF64 = 0x20, |
| IREE_VM_OP_EXT_F64_Atan2F64 = 0x21, |
| IREE_VM_OP_EXT_F64_CosF64 = 0x22, |
| IREE_VM_OP_EXT_F64_SinF64 = 0x23, |
| IREE_VM_OP_EXT_F64_ExpF64 = 0x24, |
| IREE_VM_OP_EXT_F64_Exp2F64 = 0x25, |
| IREE_VM_OP_EXT_F64_ExpM1F64 = 0x26, |
| IREE_VM_OP_EXT_F64_LogF64 = 0x27, |
| IREE_VM_OP_EXT_F64_Log10F64 = 0x28, |
| IREE_VM_OP_EXT_F64_Log1pF64 = 0x29, |
| IREE_VM_OP_EXT_F64_Log2F64 = 0x2A, |
| IREE_VM_OP_EXT_F64_PowF64 = 0x2B, |
| IREE_VM_OP_EXT_F64_RsqrtF64 = 0x2C, |
| IREE_VM_OP_EXT_F64_SqrtF64 = 0x2D, |
| IREE_VM_OP_EXT_F64_TanhF64 = 0x2E, |
| IREE_VM_OP_EXT_F64_ErfF64 = 0x2F, |
| IREE_VM_OP_EXT_F64_CmpEQF64O = 0x30, |
| IREE_VM_OP_EXT_F64_CmpEQF64U = 0x31, |
| IREE_VM_OP_EXT_F64_CmpNEF64O = 0x32, |
| IREE_VM_OP_EXT_F64_CmpNEF64U = 0x33, |
| IREE_VM_OP_EXT_F64_CmpLTF64O = 0x34, |
| IREE_VM_OP_EXT_F64_CmpLTF64U = 0x35, |
| IREE_VM_OP_EXT_F64_CmpLTEF64O = 0x36, |
| IREE_VM_OP_EXT_F64_CmpLTEF64U = 0x37, |
| IREE_VM_OP_EXT_F64_CmpNaNF64 = 0x38, |
| IREE_VM_OP_EXT_F64_BufferLoadF64 = 0x39, |
| IREE_VM_OP_EXT_F64_BufferStoreF64 = 0x3A, |
| IREE_VM_OP_EXT_F64_BufferFillF64 = 0x3B, |
| IREE_VM_OP_EXT_F64_RoundF64 = 0x3C, |
| IREE_VM_OP_EXT_F64_RSV_0x3D, |
| IREE_VM_OP_EXT_F64_RSV_0x3E, |
| IREE_VM_OP_EXT_F64_RSV_0x3F, |
| IREE_VM_OP_EXT_F64_RSV_0x40, |
| IREE_VM_OP_EXT_F64_RSV_0x41, |
| IREE_VM_OP_EXT_F64_RSV_0x42, |
| IREE_VM_OP_EXT_F64_RSV_0x43, |
| IREE_VM_OP_EXT_F64_RSV_0x44, |
| IREE_VM_OP_EXT_F64_RSV_0x45, |
| IREE_VM_OP_EXT_F64_RSV_0x46, |
| IREE_VM_OP_EXT_F64_RSV_0x47, |
| IREE_VM_OP_EXT_F64_RSV_0x48, |
| IREE_VM_OP_EXT_F64_RSV_0x49, |
| IREE_VM_OP_EXT_F64_RSV_0x4A, |
| IREE_VM_OP_EXT_F64_RSV_0x4B, |
| IREE_VM_OP_EXT_F64_RSV_0x4C, |
| IREE_VM_OP_EXT_F64_RSV_0x4D, |
| IREE_VM_OP_EXT_F64_RSV_0x4E, |
| IREE_VM_OP_EXT_F64_RSV_0x4F, |
| IREE_VM_OP_EXT_F64_RSV_0x50, |
| IREE_VM_OP_EXT_F64_RSV_0x51, |
| IREE_VM_OP_EXT_F64_RSV_0x52, |
| IREE_VM_OP_EXT_F64_RSV_0x53, |
| IREE_VM_OP_EXT_F64_RSV_0x54, |
| IREE_VM_OP_EXT_F64_RSV_0x55, |
| IREE_VM_OP_EXT_F64_RSV_0x56, |
| IREE_VM_OP_EXT_F64_RSV_0x57, |
| IREE_VM_OP_EXT_F64_RSV_0x58, |
| IREE_VM_OP_EXT_F64_RSV_0x59, |
| IREE_VM_OP_EXT_F64_RSV_0x5A, |
| IREE_VM_OP_EXT_F64_RSV_0x5B, |
| IREE_VM_OP_EXT_F64_RSV_0x5C, |
| IREE_VM_OP_EXT_F64_RSV_0x5D, |
| IREE_VM_OP_EXT_F64_RSV_0x5E, |
| IREE_VM_OP_EXT_F64_RSV_0x5F, |
| IREE_VM_OP_EXT_F64_RSV_0x60, |
| IREE_VM_OP_EXT_F64_RSV_0x61, |
| IREE_VM_OP_EXT_F64_RSV_0x62, |
| IREE_VM_OP_EXT_F64_RSV_0x63, |
| IREE_VM_OP_EXT_F64_RSV_0x64, |
| IREE_VM_OP_EXT_F64_RSV_0x65, |
| IREE_VM_OP_EXT_F64_RSV_0x66, |
| IREE_VM_OP_EXT_F64_RSV_0x67, |
| IREE_VM_OP_EXT_F64_RSV_0x68, |
| IREE_VM_OP_EXT_F64_RSV_0x69, |
| IREE_VM_OP_EXT_F64_RSV_0x6A, |
| IREE_VM_OP_EXT_F64_RSV_0x6B, |
| IREE_VM_OP_EXT_F64_RSV_0x6C, |
| IREE_VM_OP_EXT_F64_RSV_0x6D, |
| IREE_VM_OP_EXT_F64_RSV_0x6E, |
| IREE_VM_OP_EXT_F64_RSV_0x6F, |
| IREE_VM_OP_EXT_F64_RSV_0x70, |
| IREE_VM_OP_EXT_F64_RSV_0x71, |
| IREE_VM_OP_EXT_F64_RSV_0x72, |
| IREE_VM_OP_EXT_F64_RSV_0x73, |
| IREE_VM_OP_EXT_F64_RSV_0x74, |
| IREE_VM_OP_EXT_F64_RSV_0x75, |
| IREE_VM_OP_EXT_F64_RSV_0x76, |
| IREE_VM_OP_EXT_F64_RSV_0x77, |
| IREE_VM_OP_EXT_F64_RSV_0x78, |
| IREE_VM_OP_EXT_F64_RSV_0x79, |
| IREE_VM_OP_EXT_F64_RSV_0x7A, |
| IREE_VM_OP_EXT_F64_RSV_0x7B, |
| IREE_VM_OP_EXT_F64_RSV_0x7C, |
| IREE_VM_OP_EXT_F64_RSV_0x7D, |
| IREE_VM_OP_EXT_F64_RSV_0x7E, |
| IREE_VM_OP_EXT_F64_RSV_0x7F, |
| IREE_VM_OP_EXT_F64_RSV_0x80, |
| IREE_VM_OP_EXT_F64_RSV_0x81, |
| IREE_VM_OP_EXT_F64_RSV_0x82, |
| IREE_VM_OP_EXT_F64_RSV_0x83, |
| IREE_VM_OP_EXT_F64_RSV_0x84, |
| IREE_VM_OP_EXT_F64_RSV_0x85, |
| IREE_VM_OP_EXT_F64_RSV_0x86, |
| IREE_VM_OP_EXT_F64_RSV_0x87, |
| IREE_VM_OP_EXT_F64_RSV_0x88, |
| IREE_VM_OP_EXT_F64_RSV_0x89, |
| IREE_VM_OP_EXT_F64_RSV_0x8A, |
| IREE_VM_OP_EXT_F64_RSV_0x8B, |
| IREE_VM_OP_EXT_F64_RSV_0x8C, |
| IREE_VM_OP_EXT_F64_RSV_0x8D, |
| IREE_VM_OP_EXT_F64_RSV_0x8E, |
| IREE_VM_OP_EXT_F64_RSV_0x8F, |
| IREE_VM_OP_EXT_F64_RSV_0x90, |
| IREE_VM_OP_EXT_F64_RSV_0x91, |
| IREE_VM_OP_EXT_F64_RSV_0x92, |
| IREE_VM_OP_EXT_F64_RSV_0x93, |
| IREE_VM_OP_EXT_F64_RSV_0x94, |
| IREE_VM_OP_EXT_F64_RSV_0x95, |
| IREE_VM_OP_EXT_F64_RSV_0x96, |
| IREE_VM_OP_EXT_F64_RSV_0x97, |
| IREE_VM_OP_EXT_F64_RSV_0x98, |
| IREE_VM_OP_EXT_F64_RSV_0x99, |
| IREE_VM_OP_EXT_F64_RSV_0x9A, |
| IREE_VM_OP_EXT_F64_RSV_0x9B, |
| IREE_VM_OP_EXT_F64_RSV_0x9C, |
| IREE_VM_OP_EXT_F64_RSV_0x9D, |
| IREE_VM_OP_EXT_F64_RSV_0x9E, |
| IREE_VM_OP_EXT_F64_RSV_0x9F, |
| IREE_VM_OP_EXT_F64_RSV_0xA0, |
| IREE_VM_OP_EXT_F64_RSV_0xA1, |
| IREE_VM_OP_EXT_F64_RSV_0xA2, |
| IREE_VM_OP_EXT_F64_RSV_0xA3, |
| IREE_VM_OP_EXT_F64_RSV_0xA4, |
| IREE_VM_OP_EXT_F64_RSV_0xA5, |
| IREE_VM_OP_EXT_F64_RSV_0xA6, |
| IREE_VM_OP_EXT_F64_RSV_0xA7, |
| IREE_VM_OP_EXT_F64_RSV_0xA8, |
| IREE_VM_OP_EXT_F64_RSV_0xA9, |
| IREE_VM_OP_EXT_F64_RSV_0xAA, |
| IREE_VM_OP_EXT_F64_RSV_0xAB, |
| IREE_VM_OP_EXT_F64_RSV_0xAC, |
| IREE_VM_OP_EXT_F64_RSV_0xAD, |
| IREE_VM_OP_EXT_F64_RSV_0xAE, |
| IREE_VM_OP_EXT_F64_RSV_0xAF, |
| IREE_VM_OP_EXT_F64_RSV_0xB0, |
| IREE_VM_OP_EXT_F64_RSV_0xB1, |
| IREE_VM_OP_EXT_F64_RSV_0xB2, |
| IREE_VM_OP_EXT_F64_RSV_0xB3, |
| IREE_VM_OP_EXT_F64_RSV_0xB4, |
| IREE_VM_OP_EXT_F64_RSV_0xB5, |
| IREE_VM_OP_EXT_F64_RSV_0xB6, |
| IREE_VM_OP_EXT_F64_RSV_0xB7, |
| IREE_VM_OP_EXT_F64_RSV_0xB8, |
| IREE_VM_OP_EXT_F64_RSV_0xB9, |
| IREE_VM_OP_EXT_F64_RSV_0xBA, |
| IREE_VM_OP_EXT_F64_RSV_0xBB, |
| IREE_VM_OP_EXT_F64_RSV_0xBC, |
| IREE_VM_OP_EXT_F64_RSV_0xBD, |
| IREE_VM_OP_EXT_F64_RSV_0xBE, |
| IREE_VM_OP_EXT_F64_RSV_0xBF, |
| IREE_VM_OP_EXT_F64_RSV_0xC0, |
| IREE_VM_OP_EXT_F64_RSV_0xC1, |
| IREE_VM_OP_EXT_F64_RSV_0xC2, |
| IREE_VM_OP_EXT_F64_RSV_0xC3, |
| IREE_VM_OP_EXT_F64_RSV_0xC4, |
| IREE_VM_OP_EXT_F64_RSV_0xC5, |
| IREE_VM_OP_EXT_F64_RSV_0xC6, |
| IREE_VM_OP_EXT_F64_RSV_0xC7, |
| IREE_VM_OP_EXT_F64_RSV_0xC8, |
| IREE_VM_OP_EXT_F64_RSV_0xC9, |
| IREE_VM_OP_EXT_F64_RSV_0xCA, |
| IREE_VM_OP_EXT_F64_RSV_0xCB, |
| IREE_VM_OP_EXT_F64_RSV_0xCC, |
| IREE_VM_OP_EXT_F64_RSV_0xCD, |
| IREE_VM_OP_EXT_F64_RSV_0xCE, |
| IREE_VM_OP_EXT_F64_RSV_0xCF, |
| IREE_VM_OP_EXT_F64_RSV_0xD0, |
| IREE_VM_OP_EXT_F64_RSV_0xD1, |
| IREE_VM_OP_EXT_F64_RSV_0xD2, |
| IREE_VM_OP_EXT_F64_RSV_0xD3, |
| IREE_VM_OP_EXT_F64_RSV_0xD4, |
| IREE_VM_OP_EXT_F64_RSV_0xD5, |
| IREE_VM_OP_EXT_F64_RSV_0xD6, |
| IREE_VM_OP_EXT_F64_RSV_0xD7, |
| IREE_VM_OP_EXT_F64_RSV_0xD8, |
| IREE_VM_OP_EXT_F64_RSV_0xD9, |
| IREE_VM_OP_EXT_F64_RSV_0xDA, |
| IREE_VM_OP_EXT_F64_RSV_0xDB, |
| IREE_VM_OP_EXT_F64_RSV_0xDC, |
| IREE_VM_OP_EXT_F64_RSV_0xDD, |
| IREE_VM_OP_EXT_F64_RSV_0xDE, |
| IREE_VM_OP_EXT_F64_RSV_0xDF, |
| IREE_VM_OP_EXT_F64_RSV_0xE0, |
| IREE_VM_OP_EXT_F64_RSV_0xE1, |
| IREE_VM_OP_EXT_F64_RSV_0xE2, |
| IREE_VM_OP_EXT_F64_RSV_0xE3, |
| IREE_VM_OP_EXT_F64_RSV_0xE4, |
| IREE_VM_OP_EXT_F64_RSV_0xE5, |
| IREE_VM_OP_EXT_F64_RSV_0xE6, |
| IREE_VM_OP_EXT_F64_RSV_0xE7, |
| IREE_VM_OP_EXT_F64_RSV_0xE8, |
| IREE_VM_OP_EXT_F64_RSV_0xE9, |
| IREE_VM_OP_EXT_F64_RSV_0xEA, |
| IREE_VM_OP_EXT_F64_RSV_0xEB, |
| IREE_VM_OP_EXT_F64_RSV_0xEC, |
| IREE_VM_OP_EXT_F64_RSV_0xED, |
| IREE_VM_OP_EXT_F64_RSV_0xEE, |
| IREE_VM_OP_EXT_F64_RSV_0xEF, |
| IREE_VM_OP_EXT_F64_RSV_0xF0, |
| IREE_VM_OP_EXT_F64_RSV_0xF1, |
| IREE_VM_OP_EXT_F64_RSV_0xF2, |
| IREE_VM_OP_EXT_F64_RSV_0xF3, |
| IREE_VM_OP_EXT_F64_RSV_0xF4, |
| IREE_VM_OP_EXT_F64_RSV_0xF5, |
| IREE_VM_OP_EXT_F64_RSV_0xF6, |
| IREE_VM_OP_EXT_F64_RSV_0xF7, |
| IREE_VM_OP_EXT_F64_RSV_0xF8, |
| IREE_VM_OP_EXT_F64_RSV_0xF9, |
| IREE_VM_OP_EXT_F64_RSV_0xFA, |
| IREE_VM_OP_EXT_F64_RSV_0xFB, |
| IREE_VM_OP_EXT_F64_RSV_0xFC, |
| IREE_VM_OP_EXT_F64_RSV_0xFD, |
| IREE_VM_OP_EXT_F64_RSV_0xFE, |
| IREE_VM_OP_EXT_F64_RSV_0xFF, |
| } iree_vm_ext_f64_op_t; |
| |
| #define IREE_VM_OP_EXT_F64_TABLE(OPC, RSV) \ |
| OPC(0x00, GlobalLoadF64) \ |
| OPC(0x01, GlobalStoreF64) \ |
| OPC(0x02, GlobalLoadIndirectF64) \ |
| OPC(0x03, GlobalStoreIndirectF64) \ |
| OPC(0x04, ConstF64Zero) \ |
| OPC(0x05, ConstF64) \ |
| OPC(0x06, ListGetF64) \ |
| OPC(0x07, ListSetF64) \ |
| OPC(0x08, SelectF64) \ |
| OPC(0x09, SwitchF64) \ |
| OPC(0x0A, AddF64) \ |
| OPC(0x0B, SubF64) \ |
| OPC(0x0C, MulF64) \ |
| OPC(0x0D, DivF64) \ |
| OPC(0x0E, RemF64) \ |
| OPC(0x0F, FMAF64) \ |
| OPC(0x10, AbsF64) \ |
| OPC(0x11, NegF64) \ |
| OPC(0x12, CeilF64) \ |
| OPC(0x13, FloorF64) \ |
| OPC(0x14, TruncF64F32) \ |
| OPC(0x15, ExtF32F64) \ |
| OPC(0x16, CastSI32F64) \ |
| OPC(0x17, CastUI32F64) \ |
| OPC(0x18, CastF64SI32) \ |
| OPC(0x19, CastF64UI32) \ |
| OPC(0x1A, CastSI64F64) \ |
| OPC(0x1B, CastUI64F64) \ |
| OPC(0x1C, CastF64SI64) \ |
| OPC(0x1D, CastF64UI64) \ |
| OPC(0x1E, BitcastI64F64) \ |
| OPC(0x1F, BitcastF64I64) \ |
| OPC(0x20, AtanF64) \ |
| OPC(0x21, Atan2F64) \ |
| OPC(0x22, CosF64) \ |
| OPC(0x23, SinF64) \ |
| OPC(0x24, ExpF64) \ |
| OPC(0x25, Exp2F64) \ |
| OPC(0x26, ExpM1F64) \ |
| OPC(0x27, LogF64) \ |
| OPC(0x28, Log10F64) \ |
| OPC(0x29, Log1pF64) \ |
| OPC(0x2A, Log2F64) \ |
| OPC(0x2B, PowF64) \ |
| OPC(0x2C, RsqrtF64) \ |
| OPC(0x2D, SqrtF64) \ |
| OPC(0x2E, TanhF64) \ |
| OPC(0x2F, ErfF64) \ |
| OPC(0x30, CmpEQF64O) \ |
| OPC(0x31, CmpEQF64U) \ |
| OPC(0x32, CmpNEF64O) \ |
| OPC(0x33, CmpNEF64U) \ |
| OPC(0x34, CmpLTF64O) \ |
| OPC(0x35, CmpLTF64U) \ |
| OPC(0x36, CmpLTEF64O) \ |
| OPC(0x37, CmpLTEF64U) \ |
| OPC(0x38, CmpNaNF64) \ |
| OPC(0x39, BufferLoadF64) \ |
| OPC(0x3A, BufferStoreF64) \ |
| OPC(0x3B, BufferFillF64) \ |
| OPC(0x3C, RoundF64) \ |
| RSV(0x3D) \ |
| RSV(0x3E) \ |
| RSV(0x3F) \ |
| RSV(0x40) \ |
| RSV(0x41) \ |
| RSV(0x42) \ |
| RSV(0x43) \ |
| RSV(0x44) \ |
| RSV(0x45) \ |
| RSV(0x46) \ |
| RSV(0x47) \ |
| RSV(0x48) \ |
| RSV(0x49) \ |
| RSV(0x4A) \ |
| RSV(0x4B) \ |
| RSV(0x4C) \ |
| RSV(0x4D) \ |
| RSV(0x4E) \ |
| RSV(0x4F) \ |
| RSV(0x50) \ |
| RSV(0x51) \ |
| RSV(0x52) \ |
| RSV(0x53) \ |
| RSV(0x54) \ |
| RSV(0x55) \ |
| RSV(0x56) \ |
| RSV(0x57) \ |
| RSV(0x58) \ |
| RSV(0x59) \ |
| RSV(0x5A) \ |
| RSV(0x5B) \ |
| RSV(0x5C) \ |
| RSV(0x5D) \ |
| RSV(0x5E) \ |
| RSV(0x5F) \ |
| RSV(0x60) \ |
| RSV(0x61) \ |
| RSV(0x62) \ |
| RSV(0x63) \ |
| RSV(0x64) \ |
| RSV(0x65) \ |
| RSV(0x66) \ |
| RSV(0x67) \ |
| RSV(0x68) \ |
| RSV(0x69) \ |
| RSV(0x6A) \ |
| RSV(0x6B) \ |
| RSV(0x6C) \ |
| RSV(0x6D) \ |
| RSV(0x6E) \ |
| RSV(0x6F) \ |
| RSV(0x70) \ |
| RSV(0x71) \ |
| RSV(0x72) \ |
| RSV(0x73) \ |
| RSV(0x74) \ |
| RSV(0x75) \ |
| RSV(0x76) \ |
| RSV(0x77) \ |
| RSV(0x78) \ |
| RSV(0x79) \ |
| RSV(0x7A) \ |
| RSV(0x7B) \ |
| RSV(0x7C) \ |
| RSV(0x7D) \ |
| RSV(0x7E) \ |
| RSV(0x7F) \ |
| RSV(0x80) \ |
| RSV(0x81) \ |
| RSV(0x82) \ |
| RSV(0x83) \ |
| RSV(0x84) \ |
| RSV(0x85) \ |
| RSV(0x86) \ |
| RSV(0x87) \ |
| RSV(0x88) \ |
| RSV(0x89) \ |
| RSV(0x8A) \ |
| RSV(0x8B) \ |
| RSV(0x8C) \ |
| RSV(0x8D) \ |
| RSV(0x8E) \ |
| RSV(0x8F) \ |
| RSV(0x90) \ |
| RSV(0x91) \ |
| RSV(0x92) \ |
| RSV(0x93) \ |
| RSV(0x94) \ |
| RSV(0x95) \ |
| RSV(0x96) \ |
| RSV(0x97) \ |
| RSV(0x98) \ |
| RSV(0x99) \ |
| RSV(0x9A) \ |
| RSV(0x9B) \ |
| RSV(0x9C) \ |
| RSV(0x9D) \ |
| RSV(0x9E) \ |
| RSV(0x9F) \ |
| RSV(0xA0) \ |
| RSV(0xA1) \ |
| RSV(0xA2) \ |
| RSV(0xA3) \ |
| RSV(0xA4) \ |
| RSV(0xA5) \ |
| RSV(0xA6) \ |
| RSV(0xA7) \ |
| RSV(0xA8) \ |
| RSV(0xA9) \ |
| RSV(0xAA) \ |
| RSV(0xAB) \ |
| RSV(0xAC) \ |
| RSV(0xAD) \ |
| RSV(0xAE) \ |
| RSV(0xAF) \ |
| RSV(0xB0) \ |
| RSV(0xB1) \ |
| RSV(0xB2) \ |
| RSV(0xB3) \ |
| RSV(0xB4) \ |
| RSV(0xB5) \ |
| RSV(0xB6) \ |
| RSV(0xB7) \ |
| RSV(0xB8) \ |
| RSV(0xB9) \ |
| RSV(0xBA) \ |
| RSV(0xBB) \ |
| RSV(0xBC) \ |
| RSV(0xBD) \ |
| RSV(0xBE) \ |
| RSV(0xBF) \ |
| RSV(0xC0) \ |
| RSV(0xC1) \ |
| RSV(0xC2) \ |
| RSV(0xC3) \ |
| RSV(0xC4) \ |
| RSV(0xC5) \ |
| RSV(0xC6) \ |
| RSV(0xC7) \ |
| RSV(0xC8) \ |
| RSV(0xC9) \ |
| RSV(0xCA) \ |
| RSV(0xCB) \ |
| RSV(0xCC) \ |
| RSV(0xCD) \ |
| RSV(0xCE) \ |
| RSV(0xCF) \ |
| RSV(0xD0) \ |
| RSV(0xD1) \ |
| RSV(0xD2) \ |
| RSV(0xD3) \ |
| RSV(0xD4) \ |
| RSV(0xD5) \ |
| RSV(0xD6) \ |
| RSV(0xD7) \ |
| RSV(0xD8) \ |
| RSV(0xD9) \ |
| RSV(0xDA) \ |
| RSV(0xDB) \ |
| RSV(0xDC) \ |
| RSV(0xDD) \ |
| RSV(0xDE) \ |
| RSV(0xDF) \ |
| RSV(0xE0) \ |
| RSV(0xE1) \ |
| RSV(0xE2) \ |
| RSV(0xE3) \ |
| RSV(0xE4) \ |
| RSV(0xE5) \ |
| RSV(0xE6) \ |
| RSV(0xE7) \ |
| RSV(0xE8) \ |
| RSV(0xE9) \ |
| RSV(0xEA) \ |
| RSV(0xEB) \ |
| RSV(0xEC) \ |
| RSV(0xED) \ |
| RSV(0xEE) \ |
| RSV(0xEF) \ |
| RSV(0xF0) \ |
| RSV(0xF1) \ |
| RSV(0xF2) \ |
| RSV(0xF3) \ |
| RSV(0xF4) \ |
| RSV(0xF5) \ |
| RSV(0xF6) \ |
| RSV(0xF7) \ |
| RSV(0xF8) \ |
| RSV(0xF9) \ |
| RSV(0xFA) \ |
| RSV(0xFB) \ |
| RSV(0xFC) \ |
| RSV(0xFD) \ |
| RSV(0xFE) \ |
| RSV(0xFF) |
