Integrate LLVM to llvm/llvm-project@917117ceeebf (#24588)
Drop getEmptyKey() and getTombstoneKey() for DenseMapInfo-related
classes. The reason is that LLVM dropped those in:
1e3dc606df3a [DenseMap] Store occupancy in a packed used-bit array
(#201281) 1f10f1ca8af3 [DenseMap] Replace tombstone deletion with TAOCP
6.4 Algorithm R (#200595)
Dropping this was also needed in stablehlo and torch-mlir. Those
submodules are updated here as well.
In ROCM mlir_ukernels, the syntax of "rocdl.sched.barrier" had to be
adapted to use "none" instead of "0".
Furthermore, it now prints the keyword without brackets.
681fc74ac47e [mlir][ROCDL] Move ROCDL intrinsic enum immargs to enums
(#198875)
Ranked-tensor type-constraint description gained "non-token"
67aaa03dac58 [mlir][IR] Add builtin `TokenType` (#195640)
emitc.call_opaque prints args/template_args as properties <{...}>
8f58a4cab3a7 [mlir][emitc]: Add MemberCallOpaque op (#200057)
cmpi+select clamp idioms fold to arith.minsi/arith.maxsi
e26ef0c94341 [mlir][arith] Canonicalize cmpi select to min/max (#201737)
Signed-off-by: Stefan Schuermans <schuermans@roofline.ai>diff --git a/MODULE.bazel b/MODULE.bazel
index 02a431f..a75ab70 100644
--- a/MODULE.bazel
+++ b/MODULE.bazel
@@ -48,6 +48,13 @@
path = "third_party/llvm-project/utils/bazel",
)
+# Third-party dependencies that LLVM's bzlmod setup now sources from the Bazel
+# Central Registry as bazel_deps (previously generated by llvm_repos_extension).
+# IREE only references nanobind directly (//runtime/bindings/python); gmp, mpc,
+# mpfr, pfm and robin_map are consumed by the LLVM overlay itself, which now
+# declares its own bazel_deps for them.
+bazel_dep(name = "nanobind", version = "2.12.0.bcr.1")
+
# Use LLVM's extension for third-party dependencies
llvm_repos_ext = use_extension(
"@llvm-project-overlay//:extensions.bzl",
@@ -55,13 +62,7 @@
)
use_repo(
llvm_repos_ext,
- "gmp",
- "mpc",
- "mpfr",
- "nanobind",
- "pfm",
"pyyaml",
- "robin_map",
# Note: vulkan_headers is provided by iree_ext with IREE's custom BUILD.overlay
"vulkan_sdk",
)
diff --git a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f16.mlir b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f16.mlir
index bb7d809..23cb9ea 100644
--- a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f16.mlir
+++ b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f16.mlir
@@ -130,7 +130,7 @@
%rhs_vec_0_t = vector.shape_cast %rhs_vec_0 : vector<1x4x1x4xf16> to vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0_t, %rhs_vec_0_t) outs(%iter) {
@@ -142,7 +142,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_thread_0 = tensor.extract_slice %rhs [%i, %c0, %glb#0, %glb#1, %c0] [1, 1, 1, 1, 8] [1, 1, 1, 1, 1] : !in_ty to tensor<1x1x1x8xf16>
@@ -165,7 +165,7 @@
%rhs_vec_1_t = vector.shape_cast %rhs_vec_1 : vector<1x4x1x4xf16> to vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1_t, %rhs_vec_1_t) outs(%dot0) {
@@ -177,7 +177,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Local loads of lhs and rhs.
%lhs_vec_2 = vector.transfer_read %lhs_shared[%c2, %m_outer, %ids#2, %c0], %cst {in_bounds = [true, true, true, true]} : !shared_ty, vector<1x8x1x4xf16>
@@ -191,7 +191,7 @@
%rhs_vec_3_t = vector.shape_cast %rhs_vec_3 : vector<1x4x1x4xf16> to vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2_t, %rhs_vec_2_t) outs(%dot1) {
@@ -203,7 +203,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Local stores of lhs and rhs.
vector.transfer_write %rhs_vec_local_0_t, %rhs_shared [%c0, %glb#0, %glb_inner, %c0] {in_bounds = [true, true, true, true]} : vector<1x1x2x4xf16>, !shared_ty
@@ -217,7 +217,7 @@
vector.transfer_write %lhs_vec_local_3_t, %lhs_shared [%c3, %glb#0, %glb_inner, %c0] {in_bounds = [true, true, true, true]} : vector<1x1x2x4xf16>, !shared_ty
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3_t, %rhs_vec_3_t) outs(%dot2) {
@@ -229,7 +229,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
diff --git a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f8E4M3FN.mlir b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f8E4M3FN.mlir
index a0b5052..5a5415e 100644
--- a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f8E4M3FN.mlir
+++ b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f8E4M3FN.mlir
@@ -121,7 +121,7 @@
%rhs_vec_0_t = vector.shape_cast %rhs_vec_0 : vector<1x4x1x8xf8E4M3FN> to vector<4x1x1x8xf8E4M3FN>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0_t, %rhs_vec_0_t) outs(%iter) {
@@ -133,7 +133,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_thread_0 = tensor.extract_slice %rhs [%i, %c0, %glb0_rhs, %glb#1, %c0] [1, 1, 1, 1, 16] [1, 1, 1, 1, 1] : !rhs_in_ty to tensor<1x1x1x16xf8E4M3FN>
@@ -156,7 +156,7 @@
%rhs_vec_1_t = vector.shape_cast %rhs_vec_1 : vector<1x4x1x8xf8E4M3FN> to vector<4x1x1x8xf8E4M3FN>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1_t, %rhs_vec_1_t) outs(%dot0) {
@@ -168,7 +168,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Local loads of lhs and rhs.
%lhs_vec_2 = vector.transfer_read %lhs_shared[%c2, %m_outer, %ids#2, %c0], %cst {in_bounds = [true, true, true, true]} : !lhs_shared_ty, vector<1x8x1x8xf8E4M3FN>
@@ -182,7 +182,7 @@
%rhs_vec_3_t = vector.shape_cast %rhs_vec_3 : vector<1x4x1x8xf8E4M3FN> to vector<4x1x1x8xf8E4M3FN>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2_t, %rhs_vec_2_t) outs(%dot1) {
@@ -194,7 +194,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Local stores of lhs and rhs.
vector.transfer_write %rhs_vec_local_0_t, %rhs_shared [%c0, %glb0_rhs, %glb_inner, %c0] {in_bounds = [true, true, true, true]} : vector<1x1x2x8xf8E4M3FN>, !rhs_shared_ty
@@ -208,7 +208,7 @@
vector.transfer_write %lhs_vec_local_3_t, %lhs_shared [%c3, %glb0_lhs, %glb_inner, %c0] {in_bounds = [true, true, true, true]} : vector<1x1x2x8xf8E4M3FN>, !lhs_shared_ty
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3_t, %rhs_vec_3_t) outs(%dot2) {
@@ -220,7 +220,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
diff --git a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f8E4M3FNUZ.mlir b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f8E4M3FNUZ.mlir
index bd036ab..1225b8a 100644
--- a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f8E4M3FNUZ.mlir
+++ b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_matmul_f8E4M3FNUZ.mlir
@@ -133,7 +133,7 @@
%rhs_vec_0_t = vector.shape_cast %rhs_vec_0 : vector<1x4x1x8xf8E4M3FNUZ> to vector<4x1x1x8xf8E4M3FNUZ>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0_t, %rhs_vec_0_t) outs(%iter) {
@@ -145,7 +145,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_thread_0 = tensor.extract_slice %rhs [%i, %c0, %glb#0, %glb#1, %c0] [1, 1, 1, 1, 16] [1, 1, 1, 1, 1] : !in_ty to tensor<1x1x1x16xf8E4M3FNUZ>
@@ -168,7 +168,7 @@
%rhs_vec_1_t = vector.shape_cast %rhs_vec_1 : vector<1x4x1x8xf8E4M3FNUZ> to vector<4x1x1x8xf8E4M3FNUZ>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1_t, %rhs_vec_1_t) outs(%dot0) {
@@ -180,7 +180,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Local loads.
%lhs_vec_2 = vector.transfer_read %lhs_shared[%c2, %m_outer, %ids#2, %c0], %cst {in_bounds = [true, true, true, true]} : !shared_ty, vector<1x8x1x8xf8E4M3FNUZ>
@@ -195,7 +195,7 @@
%rhs_vec_3_t = vector.shape_cast %rhs_vec_3 : vector<1x4x1x8xf8E4M3FNUZ> to vector<4x1x1x8xf8E4M3FNUZ>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2_t, %rhs_vec_2_t) outs(%dot1) {
@@ -207,7 +207,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Local stores of lhs and rhs.
vector.transfer_write %rhs_vec_local_0_t, %rhs_shared [%c0, %glb#0, %glb_inner, %c0] {in_bounds = [true, true, true, true]} : vector<1x1x2x8xf8E4M3FNUZ>, !shared_ty
@@ -221,7 +221,7 @@
vector.transfer_write %lhs_vec_local_3_t, %lhs_shared [%c3, %glb#0, %glb_inner, %c0] {in_bounds = [true, true, true, true]} : vector<1x1x2x8xf8E4M3FNUZ>, !shared_ty
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3_t, %rhs_vec_3_t) outs(%dot2) {
@@ -233,7 +233,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
@@ -385,7 +385,7 @@
%lhs_vec_0_t = vector.shape_cast %lhs_vec_0 : vector<1x8x1x16xf8E4M3FNUZ> to vector<8x2x1x8xf8E4M3FNUZ>
%lhs_vec_2_t = vector.shape_cast %lhs_vec_2 : vector<1x8x1x16xf8E4M3FNUZ> to vector<8x2x1x8xf8E4M3FNUZ>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of lhs.
%lhs_thread_0 = tensor.extract_slice %lhs [%i, %c0, %ids#1, %ids#2, %c0] [1, 1, 1, 1, 16] [1, 1, 1, 1, 1] : !m_lhs_ty to tensor<1x1x1x16xf8E4M3FNUZ>
@@ -393,7 +393,7 @@
%lhs_thread_1 = tensor.extract_slice %lhs [%i, %c1, %ids#1, %ids#2, %c0] [1, 1, 1, 1, 16] [1, 1, 1, 1, 1] : !m_lhs_ty to tensor<1x1x1x16xf8E4M3FNUZ>
%lhs_vec_local_1 = vector.transfer_read %lhs_thread_1 [%c0, %c0, %c0, %c0], %cst {in_bounds = [true, true, true, true]} : tensor<1x1x1x16xf8E4M3FNUZ>, vector<1x1x1x16xf8E4M3FNUZ>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Local loads of rhs.
%rhs_vec = vector.transfer_read %rhs_shared[%c0, %glb0_rhs, %ids#2, %c0], %cst {in_bounds = [true, true, true, true]} : !m_rhs_shared_ty, vector<2x2x1x16xf8E4M3FNUZ>
@@ -402,7 +402,7 @@
%rhs_vec_0_t = vector.shape_cast %rhs_vec_0 : vector<1x2x1x16xf8E4M3FNUZ> to vector<2x2x1x8xf8E4M3FNUZ>
%rhs_vec_2_t = vector.shape_cast %rhs_vec_2 : vector<1x2x1x16xf8E4M3FNUZ> to vector<2x2x1x8xf8E4M3FNUZ>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_thread_0 = tensor.extract_slice %rhs [%i, %c0, %glb0_rhs, %ids#2, %c0] [1, 1, 1, 1, 16] [1, 1, 1, 1, 1] : !m_rhs_ty to tensor<1x1x1x16xf8E4M3FNUZ>
@@ -415,7 +415,7 @@
%rhs_vec_local_3 = vector.transfer_read %rhs_thread_3 [%c0, %c0, %c0, %c0], %cst {in_bounds = [true, true, true, true]} : tensor<1x1x1x16xf8E4M3FNUZ>, vector<1x1x1x16xf8E4M3FNUZ>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0_t, %rhs_vec_0_t) outs(%iter) {
@@ -427,7 +427,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Local stores of lhs and rhs.
vector.transfer_write %rhs_vec_local_0, %rhs_shared[%c0, %glb0_rhs, %ids#2, %c0] {in_bounds = [true, true, true, true]} : vector<1x1x1x16xf8E4M3FNUZ>, !m_rhs_shared_ty
@@ -439,7 +439,7 @@
vector.transfer_write %lhs_vec_local_1, %lhs_shared[%c1, %ids#1, %ids#2, %c0] {in_bounds = [true, true, true, true]} : vector<1x1x1x16xf8E4M3FNUZ>, !m_lhs_shared_ty
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2_t, %rhs_vec_2_t) outs(%dot0) {
@@ -451,7 +451,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot2 : vector<8x2x1x4xf32>
}
diff --git a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_scaled_matmul_f4E2M1FN.mlir b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_scaled_matmul_f4E2M1FN.mlir
index d387f3c..da42889 100644
--- a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_scaled_matmul_f4E2M1FN.mlir
+++ b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_dt_scaled_matmul_f4E2M1FN.mlir
@@ -282,7 +282,7 @@
%lhs_scale_byte_vec_t = vector.shape_cast %lhs_scale_byte_vec : vector<1x8xi8> to !lhs_scale_byte_vec_ty
%lhs_scale_vec = vector.bitcast %lhs_scale_byte_vec_t : !lhs_scale_byte_vec_ty to !lhs_scale_vec_ty
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%rhs_byte_vec = vector.transfer_read %rhs_shared_base[%rhs_outer, %rhs_inner],
%cst_rhs {in_bounds = [true, true]} : !rhs_shared_ty, vector<16x16xi8>
@@ -295,7 +295,7 @@
%rhs_scale_vec = vector.bitcast %rhs_scale_byte_vec_t : !rhs_scale_byte_vec_ty to !rhs_scale_vec_ty
amdgpu.lds_barrier
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%dot = iree_codegen.inner_tiled ins(%lhs_vec, %rhs_vec, %lhs_scale_vec, %rhs_scale_vec) outs(%iter) {
indexing_maps = #contraction_accesses,
diff --git a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_bf16.mlir b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_bf16.mlir
index ee3e190..2929032 100644
--- a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_bf16.mlir
+++ b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_bf16.mlir
@@ -117,7 +117,7 @@
%rhs_vec_0 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c0, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<4x1x1x4xbf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0, %rhs_vec_0) outs(%iter) {
@@ -129,7 +129,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 64] [1, 1] : !bf16_in_ty to !bf16_block_in
@@ -146,7 +146,7 @@
%rhs_vec_1 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c1, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<4x1x1x4xbf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1, %rhs_vec_1) outs(%dot0) {
@@ -158,7 +158,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<8x1x1x4xbf16>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<4x1x1x4xbf16>
@@ -167,7 +167,7 @@
%rhs_vec_3 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c3, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<4x1x1x4xbf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2, %rhs_vec_2) outs(%dot1) {
@@ -179,7 +179,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %lhs_vec_local_0, %lhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !bf16_shared
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !bf16_shared
@@ -192,7 +192,7 @@
vector.transfer_write %rhs_vec_local_3, %rhs_shared [%glb3, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !bf16_shared
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3, %rhs_vec_3) outs(%dot2) {
@@ -204,7 +204,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
@@ -343,7 +343,7 @@
%lhs_vec_0_t = vector.transpose %lhs_vec_0, [0, 2, 1, 3] : vector<4x1x2x4xbf16> to vector<4x2x1x4xbf16>
%rhs_vec_0_t = vector.transpose %rhs_vec_0, [0, 2, 1, 3] : vector<4x1x2x4xbf16> to vector<4x2x1x4xbf16>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 64] [1, 1] : !in_ty_bf16 to !block_in_bf16
@@ -356,14 +356,14 @@
%rhs_thread_3 = tensor.extract_slice %rhs_block [%glb3, %gko] [1, 8] [1, 1] : !block_in_bf16 to tensor<1x8xbf16>
%rhs_vec_local_3 = vector.transfer_read %rhs_thread_3 [%c0, %c0], %cst {in_bounds = [true, true]} : tensor<1x8xbf16>, vector<1x8xbf16>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !mshared_exp_bf16, vector<4x1x2x4xbf16>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_bf16, vector<4x1x2x4xbf16>
%lhs_vec_2_t = vector.transpose %lhs_vec_2, [0, 2, 1, 3] : vector<4x1x2x4xbf16> to vector<4x2x1x4xbf16>
%rhs_vec_2_t = vector.transpose %rhs_vec_2, [0, 2, 1, 3] : vector<4x1x2x4xbf16> to vector<4x2x1x4xbf16>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of lhs.
%lhs_block = tensor.extract_slice %lhs [0, 0, %i] [1, 128, 64] [1, 1, 1] : !mexp_in_ty_bf16 to !mexp_block_in_bf16
@@ -373,7 +373,7 @@
%lhs_vec_local_1 = vector.transfer_read %lhs_thread_1 [%c0, %c0, %c0], %cst {in_bounds = [true, true]} : tensor<1x1x8xbf16>, vector<1x8xbf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0_t, %rhs_vec_0_t) outs(%iter) {
@@ -385,7 +385,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %rhs_vec_local_0, %rhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !shared_bf16
vector.transfer_write %rhs_vec_local_1, %rhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !shared_bf16
@@ -396,7 +396,7 @@
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1_lhs, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !mshared_bf16
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2_t, %rhs_vec_2_t) outs(%dot0) {
@@ -408,7 +408,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot2 : vector<4x4x1x4xf32>
}
@@ -541,7 +541,7 @@
%rhs_vec_0 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c0, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<4x1x1x4xbf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0, %rhs_vec_0) outs(%iter) {
@@ -553,7 +553,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 64] [1, 1] : !bf16_in_ty to !bf16_block_in
@@ -570,7 +570,7 @@
%rhs_vec_1 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c1, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<4x1x1x4xbf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1, %rhs_vec_1) outs(%dot0) {
@@ -582,7 +582,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<8x1x1x4xbf16>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<4x1x1x4xbf16>
@@ -591,7 +591,7 @@
%rhs_vec_3 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c3, %inner_id], %cst {in_bounds = [true, true, true, true]} : !bf16_shared_exp, vector<4x1x1x4xbf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2, %rhs_vec_2) outs(%dot1) {
@@ -603,7 +603,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %lhs_vec_local_0, %lhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !bf16_shared
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !bf16_shared
@@ -616,7 +616,7 @@
vector.transfer_write %rhs_vec_local_3, %rhs_shared [%glb3, %gko] {in_bounds = [true, true]} : vector<1x8xbf16>, !bf16_shared
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3, %rhs_vec_3) outs(%dot2) {
@@ -628,7 +628,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
diff --git a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f16.mlir b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f16.mlir
index 72a6bdc..addcd28 100644
--- a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f16.mlir
+++ b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f16.mlir
@@ -109,7 +109,7 @@
%rhs_vec_0 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c0, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0, %rhs_vec_0) outs(%iter) {
@@ -121,7 +121,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 64] [1, 1] : !in_ty to !block_in
@@ -138,7 +138,7 @@
%rhs_vec_1 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c1, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1, %rhs_vec_1) outs(%dot0) {
@@ -150,7 +150,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<8x1x1x4xf16>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x1x4xf16>
@@ -159,7 +159,7 @@
%rhs_vec_3 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c3, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2, %rhs_vec_2) outs(%dot1) {
@@ -171,7 +171,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %lhs_vec_local_0, %lhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !shared
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !shared
@@ -184,7 +184,7 @@
vector.transfer_write %rhs_vec_local_3, %rhs_shared [%glb3, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !shared
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3, %rhs_vec_3) outs(%dot2) {
@@ -196,7 +196,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
@@ -333,7 +333,7 @@
%lhs_vec_0_t = vector.transpose %lhs_vec_0, [0, 2, 1, 3] : vector<4x1x2x4xf16> to vector<4x2x1x4xf16>
%rhs_vec_0_t = vector.transpose %rhs_vec_0, [0, 2, 1, 3] : vector<4x1x2x4xf16> to vector<4x2x1x4xf16>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 64] [1, 1] : !in_ty to !block_in
@@ -346,14 +346,14 @@
%rhs_thread_3 = tensor.extract_slice %rhs_block [%glb3, %gko] [1, 8] [1, 1] : !block_in to tensor<1x8xf16>
%rhs_vec_local_3 = vector.transfer_read %rhs_thread_3 [%c0, %c0], %cst {in_bounds = [true, true]} : tensor<1x8xf16>, vector<1x8xf16>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !mshared_exp, vector<4x1x2x4xf16>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x2x4xf16>
%lhs_vec_2_t = vector.transpose %lhs_vec_2, [0, 2, 1, 3] : vector<4x1x2x4xf16> to vector<4x2x1x4xf16>
%rhs_vec_2_t = vector.transpose %rhs_vec_2, [0, 2, 1, 3] : vector<4x1x2x4xf16> to vector<4x2x1x4xf16>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of lhs.
%lhs_block = tensor.extract_slice %lhs [0, 0, %i] [1, 128, 64] [1, 1, 1] : !mexp_in_ty to !mexp_block_in
@@ -363,7 +363,7 @@
%lhs_vec_local_1 = vector.transfer_read %lhs_thread_1 [%c0, %c0, %c0], %cst {in_bounds = [true, true]} : tensor<1x1x8xf16>, vector<1x8xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0_t, %rhs_vec_0_t) outs(%iter) {
@@ -375,7 +375,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %rhs_vec_local_0, %rhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !shared
vector.transfer_write %rhs_vec_local_1, %rhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !shared
@@ -386,7 +386,7 @@
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1_lhs, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !mshared
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2_t, %rhs_vec_2_t) outs(%dot0) {
@@ -398,7 +398,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot2 : vector<4x4x1x4xf32>
}
@@ -531,7 +531,7 @@
%rhs_vec_0 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c0, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0, %rhs_vec_0) outs(%iter) {
@@ -543,7 +543,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 64] [1, 1] : !in_ty to !block_in
@@ -560,7 +560,7 @@
%rhs_vec_1 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c1, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1, %rhs_vec_1) outs(%dot0) {
@@ -572,7 +572,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<8x1x1x4xf16>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x1x4xf16>
@@ -581,7 +581,7 @@
%rhs_vec_3 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c3, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp, vector<4x1x1x4xf16>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2, %rhs_vec_2) outs(%dot1) {
@@ -593,7 +593,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %lhs_vec_local_0, %lhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !shared
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !shared
@@ -606,7 +606,7 @@
vector.transfer_write %rhs_vec_local_3, %rhs_shared [%glb3, %gko] {in_bounds = [true, true]} : vector<1x8xf16>, !shared
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3, %rhs_vec_3) outs(%dot2) {
@@ -618,7 +618,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
diff --git a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f8E4M3FN.mlir b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f8E4M3FN.mlir
index 57d6cba..9c643bc 100644
--- a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f8E4M3FN.mlir
+++ b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f8E4M3FN.mlir
@@ -105,7 +105,7 @@
%lhs_vec_0_t = vector.transpose %lhs_vec_0, [0, 2, 1, 3] : vector<4x1x2x8xf8E4M3FN> to vector<4x2x1x8xf8E4M3FN>
%rhs_vec_0_t = vector.transpose %rhs_vec_0, [0, 2, 1, 3] : vector<4x1x2x8xf8E4M3FN> to vector<4x2x1x8xf8E4M3FN>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 128] [1, 1] : !in_ty_f8 to !block_in_f8
@@ -118,14 +118,14 @@
%rhs_thread_3 = tensor.extract_slice %rhs_block [%glb3, %gko] [1, 16] [1, 1] : !block_in_f8 to tensor<1x16xf8E4M3FN>
%rhs_vec_local_3 = vector.transfer_read %rhs_thread_3 [%c0, %c0], %cst {in_bounds = [true, true]} : tensor<1x16xf8E4M3FN>, vector<1x16xf8E4M3FN>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !mshared_exp_f8, vector<4x1x2x8xf8E4M3FN>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x2x8xf8E4M3FN>
%lhs_vec_2_t = vector.transpose %lhs_vec_2, [0, 2, 1, 3] : vector<4x1x2x8xf8E4M3FN> to vector<4x2x1x8xf8E4M3FN>
%rhs_vec_2_t = vector.transpose %rhs_vec_2, [0, 2, 1, 3] : vector<4x1x2x8xf8E4M3FN> to vector<4x2x1x8xf8E4M3FN>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of lhs.
%lhs_block = tensor.extract_slice %lhs [0, 0, %i] [1, 128, 128] [1, 1, 1] : !mexp_in_ty_f8 to !mexp_block_in_f8
@@ -135,7 +135,7 @@
%lhs_vec_local_1 = vector.transfer_read %lhs_thread_1 [%c0, %c0, %c0], %cst {in_bounds = [true, true]} : tensor<1x1x16xf8E4M3FN>, vector<1x16xf8E4M3FN>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0_t, %rhs_vec_0_t) outs(%iter) {
@@ -147,7 +147,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %rhs_vec_local_0, %rhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FN>, !shared_f8
vector.transfer_write %rhs_vec_local_1, %rhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FN>, !shared_f8
@@ -158,7 +158,7 @@
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1_lhs, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FN>, !mshared_f8
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2_t, %rhs_vec_2_t) outs(%dot0) {
@@ -170,7 +170,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot2 : vector<4x4x1x4xf32>
}
@@ -305,7 +305,7 @@
%rhs_vec_0 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c0, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x1x8xf8E4M3FN>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0, %rhs_vec_0) outs(%iter) {
@@ -317,7 +317,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 128] [1, 1] : !in_ty_f8 to !block_in_f8
@@ -334,7 +334,7 @@
%rhs_vec_1 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c1, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x1x8xf8E4M3FN>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1, %rhs_vec_1) outs(%dot0) {
@@ -346,7 +346,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<8x1x1x8xf8E4M3FN>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x1x8xf8E4M3FN>
@@ -355,7 +355,7 @@
%rhs_vec_3 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c3, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x1x8xf8E4M3FN>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2, %rhs_vec_2) outs(%dot1) {
@@ -367,7 +367,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %lhs_vec_local_0, %lhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FN>, !shared_f8
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FN>, !shared_f8
@@ -380,7 +380,7 @@
vector.transfer_write %rhs_vec_local_3, %rhs_shared [%glb3, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FN>, !shared_f8
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3, %rhs_vec_3) outs(%dot2) {
@@ -392,7 +392,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
diff --git a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f8E4M3FNUZ.mlir b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f8E4M3FNUZ.mlir
index 068268c..e30e4da 100644
--- a/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f8E4M3FNUZ.mlir
+++ b/compiler/plugins/target/ROCM/builtins/mlir_ukernel/iree_uk_amdgpu_matmul_f8E4M3FNUZ.mlir
@@ -105,7 +105,7 @@
%lhs_vec_0_t = vector.transpose %lhs_vec_0, [0, 2, 1, 3] : vector<4x1x2x8xf8E4M3FNUZ> to vector<4x2x1x8xf8E4M3FNUZ>
%rhs_vec_0_t = vector.transpose %rhs_vec_0, [0, 2, 1, 3] : vector<4x1x2x8xf8E4M3FNUZ> to vector<4x2x1x8xf8E4M3FNUZ>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 128] [1, 1] : !in_ty_f8 to !block_in_f8
@@ -118,14 +118,14 @@
%rhs_thread_3 = tensor.extract_slice %rhs_block [%glb3, %gko] [1, 16] [1, 1] : !block_in_f8 to tensor<1x16xf8E4M3FNUZ>
%rhs_vec_local_3 = vector.transfer_read %rhs_thread_3 [%c0, %c0], %cst {in_bounds = [true, true]} : tensor<1x16xf8E4M3FNUZ>, vector<1x16xf8E4M3FNUZ>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !mshared_exp_f8, vector<4x1x2x8xf8E4M3FNUZ>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x2x8xf8E4M3FNUZ>
%lhs_vec_2_t = vector.transpose %lhs_vec_2, [0, 2, 1, 3] : vector<4x1x2x8xf8E4M3FNUZ> to vector<4x2x1x8xf8E4M3FNUZ>
%rhs_vec_2_t = vector.transpose %rhs_vec_2, [0, 2, 1, 3] : vector<4x1x2x8xf8E4M3FNUZ> to vector<4x2x1x8xf8E4M3FNUZ>
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of lhs.
%lhs_block = tensor.extract_slice %lhs [0, 0, %i] [1, 128, 128] [1, 1, 1] : !mexp_in_ty_f8 to !mexp_block_in_f8
@@ -135,7 +135,7 @@
%lhs_vec_local_1 = vector.transfer_read %lhs_thread_1 [%c0, %c0, %c0], %cst {in_bounds = [true, true]} : tensor<1x1x16xf8E4M3FNUZ>, vector<1x16xf8E4M3FNUZ>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0_t, %rhs_vec_0_t) outs(%iter) {
@@ -147,7 +147,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %rhs_vec_local_0, %rhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FNUZ>, !shared_f8
vector.transfer_write %rhs_vec_local_1, %rhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FNUZ>, !shared_f8
@@ -158,7 +158,7 @@
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1_lhs, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FNUZ>, !mshared_f8
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2_t, %rhs_vec_2_t) outs(%dot0) {
@@ -170,7 +170,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot2 : vector<4x4x1x4xf32>
}
@@ -305,7 +305,7 @@
%rhs_vec_0 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c0, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x1x8xf8E4M3FNUZ>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot0 = iree_codegen.inner_tiled ins(%lhs_vec_0, %rhs_vec_0) outs(%iter) {
@@ -317,7 +317,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
// Global loads of rhs.
%rhs_block = tensor.extract_slice %rhs [0, %i] [256, 128] [1, 1] : !in_ty_f8 to !block_in_f8
@@ -334,7 +334,7 @@
%rhs_vec_1 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c1, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x1x8xf8E4M3FNUZ>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot1 = iree_codegen.inner_tiled ins(%lhs_vec_1, %rhs_vec_1) outs(%dot0) {
@@ -346,7 +346,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
%lhs_vec_2 = vector.transfer_read %lhs_shared_expand[%m_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<8x1x1x8xf8E4M3FNUZ>
%rhs_vec_2 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c2, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x1x8xf8E4M3FNUZ>
@@ -355,7 +355,7 @@
%rhs_vec_3 = vector.transfer_read %rhs_shared_expand[%n_outer_id, %ids#3, %c3, %inner_id], %cst {in_bounds = [true, true, true, true]} : !shared_exp_f8, vector<4x1x1x8xf8E4M3FNUZ>
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot2 = iree_codegen.inner_tiled ins(%lhs_vec_2, %rhs_vec_2) outs(%dot1) {
@@ -367,7 +367,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
vector.transfer_write %lhs_vec_local_0, %lhs_shared [%glb0, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FNUZ>, !shared_f8
vector.transfer_write %lhs_vec_local_1, %lhs_shared [%glb1, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FNUZ>, !shared_f8
@@ -380,7 +380,7 @@
vector.transfer_write %rhs_vec_local_3, %rhs_shared [%glb3, %gko] {in_bounds = [true, true]} : vector<1x16xf8E4M3FNUZ>, !shared_f8
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
rocdl.s.setprio 1 { iree_gpu.swap_mfma = 1 }
%dot3 = iree_codegen.inner_tiled ins(%lhs_vec_3, %rhs_vec_3) outs(%dot2) {
@@ -392,7 +392,7 @@
rocdl.s.setprio 0
gpu.barrier memfence [#gpu.address_space<workgroup>]
- rocdl.sched.barrier 0
+ rocdl.sched.barrier none
scf.yield %dot3 : vector<8x4x1x4xf32>
}
diff --git a/compiler/src/iree/compiler/Codegen/LLVMGPU/Utils/ROCDLPrefetchSharedMemoryCopy.cpp b/compiler/src/iree/compiler/Codegen/LLVMGPU/Utils/ROCDLPrefetchSharedMemoryCopy.cpp
index c0dd43a..ba1cbe4 100644
--- a/compiler/src/iree/compiler/Codegen/LLVMGPU/Utils/ROCDLPrefetchSharedMemoryCopy.cpp
+++ b/compiler/src/iree/compiler/Codegen/LLVMGPU/Utils/ROCDLPrefetchSharedMemoryCopy.cpp
@@ -950,8 +950,8 @@
if (addSchedBarrier) {
amdgpu::SchedBarrierOp::create(
rewriter, loc,
- amdgpu::sched_barrier_opt_enumAttr::get(
- rewriter.getContext(), amdgpu::sched_barrier_opt_enum::none));
+ ROCDL::SchedGroupMaskAttr::get(rewriter.getContext(),
+ ROCDL::SchedGroupMask::none));
}
state.needBarrierBeforeWrite = false;
}
diff --git a/compiler/src/iree/compiler/Codegen/LLVMGPU/test/prefetch_shared_memory.mlir b/compiler/src/iree/compiler/Codegen/LLVMGPU/test/prefetch_shared_memory.mlir
index 4c44913..edb4829 100644
--- a/compiler/src/iree/compiler/Codegen/LLVMGPU/test/prefetch_shared_memory.mlir
+++ b/compiler/src/iree/compiler/Codegen/LLVMGPU/test/prefetch_shared_memory.mlir
@@ -39,7 +39,7 @@
// CHECK: %[[COMPUTE:.*]] = arith.addf %[[COMPUTE_READ]], %[[ARG]]
%3 = arith.addf %2, %arg2 : vector<1xf32>
// CHECK: gpu.barrier memfence [#gpu.address_space<workgroup>]
- // CHECK: amdgpu.sched_barrier allow = <none>
+ // CHECK: amdgpu.sched_barrier allow = none
// CHECK: vector.transfer_write %[[KER_READ]], %[[SHARED]]
// CHECK: scf.yield %[[COMPUTE]]
@@ -48,7 +48,7 @@
// CHECK-3STAGE: vector.transfer_read %alloc
// CHECK-3STAGE: arith.addf
// CHECK-3STAGE: gpu.barrier memfence [#gpu.address_space<workgroup>]
- // CHECK-3STAGE: amdgpu.sched_barrier allow = <none>
+ // CHECK-3STAGE: amdgpu.sched_barrier allow = none
// CHECK-3STAGE: vector.transfer_write
// CHECK-3STAGE: arith.constant 2
// CHECK-3STAGE: arith.addi
@@ -106,7 +106,7 @@
%3 = arith.addf %2, %arg2 : vector<1xf32>
%4 = arith.addf %3, %arg3 : vector<1xf32>
// CHECK: gpu.barrier memfence [#gpu.address_space<workgroup>]
- // CHECK: amdgpu.sched_barrier allow = <none>
+ // CHECK: amdgpu.sched_barrier allow = none
// CHECK: vector.transfer_write %[[KER_READ]], %[[SHARED]]
// CHECK: scf.yield %[[COMPUTE]], %[[COMPUTE2]]
scf.yield %3, %4 : vector<1xf32>, vector<1xf32>
@@ -162,7 +162,7 @@
// CHECK: %[[COMPUTE:.*]] = arith.addf %[[COMPUTE_READ]], %[[ARG]]
%3 = arith.addf %2, %arg2 : vector<1xf32>
// CHECK: gpu.barrier memfence [#gpu.address_space<workgroup>]
- // CHECK: amdgpu.sched_barrier allow = <none>
+ // CHECK: amdgpu.sched_barrier allow = none
// CHECK: vector.transfer_write %[[KER_READ]], %[[SHARED]]
// CHECK: scf.yield %[[COMPUTE]]
scf.yield %3 : vector<1xf32>
@@ -248,7 +248,7 @@
// CHECK: %[[COMPUTE_READ:.*]] = vector.transfer_read %[[WG_ALLOC]][%[[C0]]]
// CHECK: %[[COMPUTE:.*]] = arith.addf %[[COMPUTE_READ]], %[[ARG]]
// CHECK: gpu.barrier memfence [#gpu.address_space<workgroup>]
-// CHECK: amdgpu.sched_barrier allow = <none>
+// CHECK: amdgpu.sched_barrier allow = none
// CHECK: scf.if %[[COND]] {
// CHECK: %[[COMPUTE_RELOAD:.*]] = vector.transfer_read %[[PRIV_ALLOC2]][%[[C0]]]
// CHECK: vector.transfer_write %[[COMPUTE_RELOAD]], %[[WG_ALLOC]][%[[C0]]]
@@ -360,7 +360,7 @@
// CHECK: scf.if
// CHECK: %[[READ4:.*]] = vector.transfer_read %[[PRIV_ALLOC3]]
// CHECK: gpu.barrier memfence [#gpu.address_space<workgroup>]
-// CHECK: amdgpu.sched_barrier allow = <none>
+// CHECK: amdgpu.sched_barrier allow = none
// CHECK: vector.transfer_write %[[READ4]], %[[WG_ALLOC]]
// CHECK: scf.yield %[[COMP]]
@@ -711,7 +711,7 @@
// CHECK-NEXT: amdgpu.transpose_load %[[SHARED]]
// CHECK: arith.addf
// CHECK: gpu.barrier memfence [#gpu.address_space<workgroup>]
- // CHECK-NEXT: amdgpu.sched_barrier allow = <none>
+ // CHECK-NEXT: amdgpu.sched_barrier allow = none
// CHECK: vector.transfer_write {{.*}}, %[[SHARED]]
// CHECK: scf.yield
%2 = amdgpu.transpose_load %alloc[%c0] : memref<4xf16, #gpu.address_space<workgroup>> -> vector<4xf16>
diff --git a/compiler/src/iree/compiler/Dialect/LinalgExt/IR/test/invalid.mlir b/compiler/src/iree/compiler/Dialect/LinalgExt/IR/test/invalid.mlir
index 4dfb0aa..38db708 100644
--- a/compiler/src/iree/compiler/Dialect/LinalgExt/IR/test/invalid.mlir
+++ b/compiler/src/iree/compiler/Dialect/LinalgExt/IR/test/invalid.mlir
@@ -1320,7 +1320,7 @@
%M = tensor.empty() : tensor<2xf32>
%out = tensor.empty() : tensor<2xf32>
- // expected-error@+1 {{operand #0 must be variadic of ranked tensor of any type values, but got 'f32'}}
+ // expected-error@+1 {{operand #0 must be variadic of ranked tensor of any non-token type values, but got 'f32'}}
%max, %sum = iree_linalg_ext.exp_reduction {
indexing_maps = [
affine_map<(M,N)->()>,
@@ -1347,7 +1347,7 @@
func.func @exp_reduction_shaped_init(%S: tensor<2x3xf32>, %M : f32) -> tensor<2xf32> {
%out = tensor.empty() : tensor<2xf32>
- // expected-error@+1 {{operand #1 must be variadic of ranked tensor of any type values, but got 'f32'}}
+ // expected-error@+1 {{operand #1 must be variadic of ranked tensor of any non-token type values, but got 'f32'}}
%max, %sum = iree_linalg_ext.exp_reduction {
indexing_maps = [
affine_map<(M,N)->(M,N)>,
@@ -1878,7 +1878,7 @@
func.func @custom_op_scalar_outs_argument(%arg0 : tensor<?xf32>, %arg1 : tensor<?xf32>, %arg2 : f32) -> f32 {
%c0 = arith.constant 0 : index
- // expected-error @+1 {{operand #2 must be variadic of ranked tensor of any type values, but got 'f32'}}
+ // expected-error @+1 {{operand #2 must be variadic of ranked tensor of any non-token type values, but got 'f32'}}
%0 = iree_linalg_ext.custom_op {
indexing_maps = [affine_map<(d0) -> (d0)>, affine_map<(d0) -> (d0)>, affine_map<(d0) -> ()>],
iterator_types = [#iree_linalg_ext.iterator_type<parallel>]}
diff --git a/compiler/src/iree/compiler/Dialect/Util/Analysis/Position.cpp b/compiler/src/iree/compiler/Dialect/Util/Analysis/Position.cpp
index 3d26589..ddaf97d 100644
--- a/compiler/src/iree/compiler/Dialect/Util/Analysis/Position.cpp
+++ b/compiler/src/iree/compiler/Dialect/Util/Analysis/Position.cpp
@@ -8,20 +8,11 @@
namespace mlir::iree_compiler {
-// static
-const Position Position::EmptyKey(ENC_BLOCK,
- llvm::DenseMapInfo<void *>::getEmptyKey(), 0);
-
-// static
-const Position
- Position::TombstoneKey(ENC_BLOCK,
- llvm::DenseMapInfo<void *>::getTombstoneKey(), 0);
-
void Position::print(llvm::raw_ostream &os) const {
- if (*this == Position::EmptyKey) {
+ // A default-constructed Position carries a null block pointer; printing an
+ // empty position must not dereference it.
+ if (enc.getPointer() == nullptr) {
os << "(empty)";
- } else if (*this == Position::TombstoneKey) {
- os << "(tombstone)";
} else {
// Suboptimal printing, but it's not worth instantiating an AsmState.
// Use the print(os, asmState) version instead of <<.
@@ -47,10 +38,10 @@
}
void Position::print(llvm::raw_ostream &os, AsmState &asmState) const {
- if (*this == Position::EmptyKey) {
+ // A default-constructed Position carries a null block pointer; printing an
+ // empty position must not dereference it.
+ if (enc.getPointer() == nullptr) {
os << "(empty)";
- } else if (*this == Position::TombstoneKey) {
- os << "(tombstone)";
} else {
switch (enc.getInt()) {
case Position::ENC_VALUE: {
diff --git a/compiler/src/iree/compiler/Dialect/Util/Analysis/Position.h b/compiler/src/iree/compiler/Dialect/Util/Analysis/Position.h
index ae6f8f4..a694027 100644
--- a/compiler/src/iree/compiler/Dialect/Util/Analysis/Position.h
+++ b/compiler/src/iree/compiler/Dialect/Util/Analysis/Position.h
@@ -26,11 +26,7 @@
// llvm/Transforms/IPO/Attributor.h).
class Position {
public:
- static const Position EmptyKey;
- static const Position TombstoneKey;
-
- Position()
- : Position(ENC_BLOCK, llvm::DenseMapInfo<void *>::getEmptyKey(), 0) {}
+ Position() : Position(ENC_BLOCK, nullptr, 0) {}
static const Position forValue(Value value) {
return Position(ENC_VALUE, value.getAsOpaquePointer(), 0);
@@ -144,8 +140,6 @@
// Helper that allows Position as a key in a DenseMap.
template <>
struct DenseMapInfo<Position> {
- static inline Position getEmptyKey() { return Position::EmptyKey; }
- static inline Position getTombstoneKey() { return Position::TombstoneKey; }
static unsigned getHashValue(const Position &pos) {
return (DenseMapInfo<void *>::getHashValue(pos) << 4) ^
(DenseMapInfo<unsigned>::getHashValue(pos.ordinal));
diff --git a/compiler/src/iree/compiler/Dialect/VM/Analysis/RegisterAllocation.h b/compiler/src/iree/compiler/Dialect/VM/Analysis/RegisterAllocation.h
index 919a041..2ebabde 100644
--- a/compiler/src/iree/compiler/Dialect/VM/Analysis/RegisterAllocation.h
+++ b/compiler/src/iree/compiler/Dialect/VM/Analysis/RegisterAllocation.h
@@ -67,14 +67,6 @@
return {other.isRef(), /*isMove=*/false, other.byteWidth(), ordinal};
}
- static Register getEmptyKey() { return Register(); }
- static Register getTombstoneKey() {
- auto reg = Register();
- reg.null_ = 0;
- reg.tombstone_ = 1;
- return reg;
- }
-
Register()
: null_(1), tombstone_(0), isRef_(0), isMove_(0), byteWidth_(0),
reserved_(0), ordinal_(0) {}
@@ -300,12 +292,6 @@
struct DenseMapInfo<mlir::iree_compiler::Register> {
using Register = mlir::iree_compiler::Register;
- static inline Register getEmptyKey() { return Register::getEmptyKey(); }
-
- static inline Register getTombstoneKey() {
- return Register::getTombstoneKey();
- }
-
static unsigned getHashValue(const Register &val) {
return val.getHashValue();
}
diff --git a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/const_ops.mlir b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/const_ops.mlir
index ed532c3..30cc866 100644
--- a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/const_ops.mlir
+++ b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/const_ops.mlir
@@ -32,8 +32,8 @@
vm.func @const_ref_zero() {
// CHECK: %[[REF:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>
// CHECK-NEXT: %[[REFPTR:.+]] = apply "&"(%[[REF]]) : (!emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>
- // CHECK-NEXT: %[[SIZE:.+]] = call_opaque "sizeof"() {args = [!emitc.opaque<"iree_vm_ref_t">]} : () -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: call_opaque "memset"(%[[REFPTR]], %[[SIZE]]) {args = [0 : index, 0 : ui32, 1 : index]} : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> ()
+ // CHECK-NEXT: %[[SIZE:.+]] = call_opaque "sizeof"() <{args = [!emitc.opaque<"iree_vm_ref_t">]}> : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: call_opaque "memset"(%[[REFPTR]], %[[SIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}> : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> ()
// CHECK-NEXT: call_opaque "iree_vm_ref_release"(%[[REFPTR]]) : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> ()
%null = vm.const.ref.zero : !vm.ref<?>
vm.return
diff --git a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/control_flow_ops.mlir b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/control_flow_ops.mlir
index 7ee30a8..75abd38 100644
--- a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/control_flow_ops.mlir
+++ b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/control_flow_ops.mlir
@@ -356,7 +356,7 @@
// In case of fail, return status message.
// CHECK-NEXT: ^[[FAIL]]:
- // CHECK-NEXT: %[[MSG:.+]] = call_opaque "iree_make_cstring_view"() {args = [#emitc.opaque<"\22message\22">]}
+ // CHECK-NEXT: %[[MSG:.+]] = call_opaque "iree_make_cstring_view"() <{args = [#emitc.opaque<"\22message\22">]}>
// CHECK-SAME: : () -> !emitc.opaque<"iree_string_view_t">
// CHECK-NEXT: %[[MSG_LVAL:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<!emitc.opaque<"iree_string_view_t">>
// CHECK-NEXT: assign %[[MSG]] : !emitc.opaque<"iree_string_view_t"> to %[[MSG_LVAL]] : <!emitc.opaque<"iree_string_view_t">>
@@ -366,7 +366,7 @@
// CHECK-NEXT: %[[MSGDATA_LVAL:.+]] = "emitc.member"(%[[MSG_LVAL]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_string_view_t">>) -> !emitc.lvalue<!emitc.ptr<!emitc.opaque<"const char">>>
// CHECK-NEXT: %[[MSGDATA:.+]] = load %[[MSGDATA_LVAL]] : <!emitc.ptr<!emitc.opaque<"const char">>>
// CHECK-NEXT: %[[FAILSTATUS:.+]] = call_opaque "iree_status_allocate_f"(%[[MSGSIZEINT]], %[[MSGDATA]])
- // CHECK-SAME: {args = [#emitc.opaque<"IREE_STATUS_FAILED_PRECONDITION">, #emitc.opaque<"\22<vm>\22">, 0 : i32, #emitc.opaque<"\22%.*s\22">, 0 : index, 1 : index]}
+ // CHECK-SAME: <{args = [#emitc.opaque<"IREE_STATUS_FAILED_PRECONDITION">, #emitc.opaque<"\22<vm>\22">, 0 : i32, #emitc.opaque<"\22%.*s\22">, 0 : index, 1 : index]}>
// CHECK-SAME: : (!emitc.opaque<"int">, !emitc.ptr<!emitc.opaque<"const char">>) -> !emitc.opaque<"iree_status_t">
// CHECK-NEXT: return %[[FAILSTATUS]] : !emitc.opaque<"iree_status_t">
vm.fail %arg0, "message"
@@ -406,7 +406,7 @@
// CHECK-NEXT: assign %[[ARGSIZE]] : !emitc.opaque<"iree_host_size_t"> to %[[ARGSDATALENGTH]] : <!emitc.opaque<"iree_host_size_t">>
// CHECK-NEXT: %[[ARGSDATA:.+]] = "emitc.member"(%[[ARGBYTESPAN_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: assign %[[ARGBYTESPANDATA]] : !emitc.ptr<ui8> to %[[ARGSDATA]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "memset"(%[[ARGBYTESPANDATA]], %[[ARGALLOCASIZE]]) {args = [0 : index, 0 : ui32, 1 : index]}
+ // CHECK-NEXT: call_opaque "memset"(%[[ARGBYTESPANDATA]], %[[ARGALLOCASIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}>
// Allocate space for the result.
// CHECK-NEXT: %[[RESBYTESPAN_MEMBER:.+]] = "emitc.member"(%[[ARGSTRUCT]]) <{member = "results"}> : (!emitc.lvalue<!emitc.opaque<"iree_vm_function_call_t">>) -> !emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>
@@ -418,7 +418,7 @@
// CHECK-NEXT: assign %[[RESULTSIZE]] : !emitc.opaque<"iree_host_size_t"> to %[[RESSDATALENGTH]] : <!emitc.opaque<"iree_host_size_t">>
// CHECK-NEXT: %[[RESSDATA:.+]] = "emitc.member"(%[[RESBYTESPAN_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: assign %[[RESBYTESPANDATA]] : !emitc.ptr<ui8> to %[[RESSDATA]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "memset"(%[[RESBYTESPANDATA]], %[[RESALLOCASIZE]]) {args = [0 : index, 0 : ui32, 1 : index]}
+ // CHECK-NEXT: call_opaque "memset"(%[[RESBYTESPANDATA]], %[[RESALLOCASIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}>
// Check that we don't pack anything into the argument struct.
// CHECK-NOT: "emitc.member"(%{{.+}}) <{member = "arguments"}>
@@ -458,22 +458,22 @@
// Calculate the size of the arguments.
// CHECK-NEXT: %[[ARGSIZE0:.+]] = "emitc.constant"() <{value = #emitc.opaque<"0">}> : () -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: %[[ARGSIZE1:.+]] = call_opaque "sizeof"() {args = [i32]}
+ // CHECK-NEXT: %[[ARGSIZE1:.+]] = call_opaque "sizeof"() <{args = [i32]}>
// CHECK-NEXT: %[[ARGSIZE01:.+]] = add %[[ARGSIZE0]], %[[ARGSIZE1]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: %[[ARGSIZE2:.+]] = call_opaque "sizeof"() {args = [i32]}
+ // CHECK-NEXT: %[[ARGSIZE2:.+]] = call_opaque "sizeof"() <{args = [i32]}>
// CHECK-NEXT: %[[ARGSIZE012:.+]] = add %[[ARGSIZE01]], %[[ARGSIZE2]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: %[[ARGSIZE3:.+]] = call_opaque "sizeof"() {args = [i32]}
+ // CHECK-NEXT: %[[ARGSIZE3:.+]] = call_opaque "sizeof"() <{args = [i32]}>
// CHECK-NEXT: %[[ARGSIZE0123:.+]] = add %[[ARGSIZE012]], %[[ARGSIZE3]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: %[[ARGSIZE4:.+]] = call_opaque "sizeof"() {args = [i32]}
+ // CHECK-NEXT: %[[ARGSIZE4:.+]] = call_opaque "sizeof"() <{args = [i32]}>
// CHECK-NEXT: %[[ARGSIZE:.+]] = add %[[ARGSIZE0123]], %[[ARGSIZE4]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
// Calculate the size of the result.
// CHECK-NEXT: %[[RESULTSIZE0:.+]] = "emitc.constant"() <{value = #emitc.opaque<"0">}> : () -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: %[[RESULTSIZE1:.+]] = call_opaque "sizeof"() {args = [i32]}
+ // CHECK-NEXT: %[[RESULTSIZE1:.+]] = call_opaque "sizeof"() <{args = [i32]}>
// CHECK-NEXT: %[[RESULTSIZE:.+]] = add %[[RESULTSIZE0]], %[[RESULTSIZE1]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
@@ -494,7 +494,7 @@
// CHECK-NEXT: assign %[[ARGSIZE]] : !emitc.opaque<"iree_host_size_t"> to %[[ARGSDATALENGTH]] : <!emitc.opaque<"iree_host_size_t">>
// CHECK-NEXT: %[[ARGSDATA:.+]] = "emitc.member"(%[[ARGBYTESPAN_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: assign %[[ARGBYTESPANDATA]] : !emitc.ptr<ui8> to %[[ARGSDATA]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "memset"(%[[ARGBYTESPANDATA]], %[[ARGSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]}
+ // CHECK-NEXT: call_opaque "memset"(%[[ARGBYTESPANDATA]], %[[ARGSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}>
// Allocate space for the result.
// CHECK-NEXT: %[[RESBYTESPAN_MEMBER:.+]] = "emitc.member"(%[[ARGSTRUCT]]) <{member = "results"}> : (!emitc.lvalue<!emitc.opaque<"iree_vm_function_call_t">>) -> !emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>
@@ -504,7 +504,7 @@
// CHECK-NEXT: assign %[[RESULTSIZE]] : !emitc.opaque<"iree_host_size_t"> to %[[RESSDATALENGTH]] : <!emitc.opaque<"iree_host_size_t">>
// CHECK-NEXT: %[[RESSDATA:.+]] = "emitc.member"(%[[RESBYTESPAN_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: assign %[[RESBYTESPANDATA]] : !emitc.ptr<ui8> to %[[RESSDATA]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "memset"(%[[RESBYTESPANDATA]], %[[RESULTSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]}
+ // CHECK-NEXT: call_opaque "memset"(%[[RESBYTESPANDATA]], %[[RESULTSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}>
// Pack the arguments into the struct.
// Here we also create pointers for non-pointer types.
@@ -513,31 +513,31 @@
// CHECK-NEXT: %[[ARGSPTR:.+]] = load %[[ARGSPTR_LVAL]] : <!emitc.ptr<ui8>>
// CHECK-NEXT: %[[A1_LVAL:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<i32>
// CHECK-NEXT: assign %arg2 : i32 to %[[A1_LVAL]] : <i32>
- // CHECK-NEXT: %[[A1SIZE:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[A1SIZE:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A1PTR:.+]] = apply "&"(%[[A1_LVAL]]) : (!emitc.lvalue<i32>) -> !emitc.ptr<i32>
// CHECK-NEXT: call_opaque "memcpy"(%[[ARGSPTR]], %[[A1PTR]], %[[A1SIZE]])
- // CHECK-NEXT: %[[ARGHOSTSIZE2:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[ARGHOSTSIZE2:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A1ADDR:.+]] = add %[[ARGSPTR]], %[[ARGHOSTSIZE2]]
// CHECK-SAME: : (!emitc.ptr<ui8>, !emitc.opaque<"iree_host_size_t">) -> !emitc.ptr<ui8>
// CHECK-NEXT: %[[A2_LVAL:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<i32>
// CHECK-NEXT: assign %arg3 : i32 to %[[A2_LVAL]] : <i32>
- // CHECK-NEXT: %[[A1SIZE:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[A1SIZE:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A2PTR:.+]] = apply "&"(%[[A2_LVAL]]) : (!emitc.lvalue<i32>) -> !emitc.ptr<i32>
// CHECK-NEXT: call_opaque "memcpy"(%[[A1ADDR]], %[[A2PTR]], %[[A1SIZE]])
- // CHECK-NEXT: %[[A1SIZE2:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[A1SIZE2:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A2ADDR:.+]] = add %[[A1ADDR]], %[[A1SIZE2]]
// CHECK-SAME: : (!emitc.ptr<ui8>, !emitc.opaque<"iree_host_size_t">) -> !emitc.ptr<ui8>
// CHECK-NEXT: %[[A3_LVAL:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<i32>
// CHECK-NEXT: assign %arg4 : i32 to %[[A3_LVAL]] : <i32>
- // CHECK-NEXT: %[[A2SIZE:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[A2SIZE:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A3PTR:.+]] = apply "&"(%[[A3_LVAL]]) : (!emitc.lvalue<i32>) -> !emitc.ptr<i32>
// CHECK-NEXT: call_opaque "memcpy"(%[[A2ADDR]], %[[A3PTR]], %[[A2SIZE]])
- // CHECK-NEXT: %[[A2SIZE2:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[A2SIZE2:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A3ADDR:.+]] = add %[[A2ADDR]], %[[A2SIZE2]]
// CHECK-SAME: : (!emitc.ptr<ui8>, !emitc.opaque<"iree_host_size_t">) -> !emitc.ptr<ui8>
// CHECK-NEXT: %[[A4_LVAL:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<i32>
// CHECK-NEXT: assign %arg5 : i32 to %[[A4_LVAL]] : <i32>
- // CHECK-NEXT: %[[A3SIZE:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[A3SIZE:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A4PTR:.+]] = apply "&"(%[[A4_LVAL]]) : (!emitc.lvalue<i32>) -> !emitc.ptr<i32>
// CHECK-NEXT: call_opaque "memcpy"(%[[A3ADDR]], %[[A4PTR]], %[[A3SIZE:.+]])
@@ -553,7 +553,7 @@
// CHECK: %[[RES_MEMBER:.+]] = "emitc.member"(%[[ARGSTRUCT]]) <{member = "results"}> : (!emitc.lvalue<!emitc.opaque<"iree_vm_function_call_t">>) -> !emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>
// CHECK-NEXT: %[[RESPTR_MEMBER:.+]] = "emitc.member"(%[[RES_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: %[[RESPTR:.+]] = load %[[RESPTR_MEMBER]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: %[[RESHOSTSIZE:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[RESHOSTSIZE:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: call_opaque "memcpy"(%arg6, %[[RESPTR]], %[[RESHOSTSIZE]])
// Return ok status.
@@ -578,16 +578,16 @@
// Calculate the size of the arguments.
// CHECK-NEXT: %[[ARGSIZE0:.+]] = "emitc.constant"() <{value = #emitc.opaque<"0">}> : () -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: %[[ARGSIZE1:.+]] = call_opaque "sizeof"() {args = [i32]}
+ // CHECK-NEXT: %[[ARGSIZE1:.+]] = call_opaque "sizeof"() <{args = [i32]}>
// CHECK-NEXT: %[[ARGSIZE01:.+]] = add %[[ARGSIZE0]], %[[ARGSIZE1]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: %[[ARGSIZE2:.+]] = call_opaque "sizeof"() {args = [i32]}
+ // CHECK-NEXT: %[[ARGSIZE2:.+]] = call_opaque "sizeof"() <{args = [i32]}>
// CHECK-NEXT: %[[ARGSIZE:.+]] = add %[[ARGSIZE01]], %[[ARGSIZE2]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
// Calculate the size of the result.
// CHECK-NEXT: %[[RESULTSIZE0:.+]] = "emitc.constant"() <{value = #emitc.opaque<"0">}> : () -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: %[[RESULTSIZE1:.+]] = call_opaque "sizeof"() {args = [i32]}
+ // CHECK-NEXT: %[[RESULTSIZE1:.+]] = call_opaque "sizeof"() <{args = [i32]}>
// CHECK-NEXT: %[[RESULTSIZE:.+]] = add %[[RESULTSIZE0]], %[[RESULTSIZE1]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
@@ -608,7 +608,7 @@
// CHECK-NEXT: assign %[[ARGSIZE]] : !emitc.opaque<"iree_host_size_t"> to %[[ARGSDATALENGTH]] : <!emitc.opaque<"iree_host_size_t">>
// CHECK-NEXT: %[[ARGSDATA:.+]] = "emitc.member"(%[[ARGBYTESPAN_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: assign %[[ARGBYTESPANDATA]] : !emitc.ptr<ui8> to %[[ARGSDATA]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "memset"(%[[ARGBYTESPANDATA]], %[[ARGSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]}
+ // CHECK-NEXT: call_opaque "memset"(%[[ARGBYTESPANDATA]], %[[ARGSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}>
// Allocate space for the result.
// CHECK-NEXT: %[[RESBYTESPAN_MEMBER:.+]] = "emitc.member"(%[[ARGSTRUCT]]) <{member = "results"}> : (!emitc.lvalue<!emitc.opaque<"iree_vm_function_call_t">>) -> !emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>
@@ -618,7 +618,7 @@
// CHECK-NEXT: assign %[[RESULTSIZE]] : !emitc.opaque<"iree_host_size_t"> to %[[RESSDATALENGTH]] : <!emitc.opaque<"iree_host_size_t">>
// CHECK-NEXT: %[[RESSDATA:.+]] = "emitc.member"(%[[RESBYTESPAN_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: assign %[[RESBYTESPANDATA]] : !emitc.ptr<ui8> to %[[RESSDATA]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "memset"(%[[RESBYTESPANDATA]], %[[RESULTSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]}
+ // CHECK-NEXT: call_opaque "memset"(%[[RESBYTESPANDATA]], %[[RESULTSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}>
// Pack the arguments into the struct.
// Here we also create pointers for non-pointer types.
@@ -627,15 +627,15 @@
// CHECK-NEXT: %[[ARGSPTR:.+]] = load %[[ARGSPTR_LVAL]] : <!emitc.ptr<ui8>>
// CHECK-NEXT: %[[A1_LVAL:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<i32>
// CHECK-NEXT: assign %arg2 : i32 to %[[A1_LVAL]] : <i32>
- // CHECK-NEXT: %[[A1SIZE:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[A1SIZE:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A1PTR:.+]] = apply "&"(%[[A1_LVAL]]) : (!emitc.lvalue<i32>) -> !emitc.ptr<i32>
// CHECK-NEXT: call_opaque "memcpy"(%[[ARGSPTR]], %[[A1PTR]], %[[A1SIZE]])
- // CHECK-NEXT: %[[ARGHOSTSIZE2:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[ARGHOSTSIZE2:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A1ADDR:.+]] = add %[[ARGSPTR]], %[[ARGHOSTSIZE2]]
// CHECK-SAME: : (!emitc.ptr<ui8>, !emitc.opaque<"iree_host_size_t">) -> !emitc.ptr<ui8>
// CHECK-NEXT: %[[A2_LVAL:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<i32>
// CHECK-NEXT: assign %arg3 : i32 to %[[A2_LVAL]] : <i32>
- // CHECK-NEXT: %[[A1SIZE:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[A1SIZE:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: %[[A2PTR:.+]] = apply "&"(%[[A2_LVAL]]) : (!emitc.lvalue<i32>) -> !emitc.ptr<i32>
// CHECK-NEXT: call_opaque "memcpy"(%[[A1ADDR]], %[[A2PTR]], %[[A1SIZE]])
@@ -651,7 +651,7 @@
// CHECK: %[[RES_MEMBER:.+]] = "emitc.member"(%[[ARGSTRUCT]]) <{member = "results"}> : (!emitc.lvalue<!emitc.opaque<"iree_vm_function_call_t">>) -> !emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>
// CHECK-NEXT: %[[RESPTR_MEMBER:.+]] = "emitc.member"(%[[RES_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: %[[RESPTR:.+]] = load %[[RESPTR_MEMBER]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: %[[RESHOSTSIZE:.+]] = call_opaque "sizeof"() {args = [i32]} : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: %[[RESHOSTSIZE:.+]] = call_opaque "sizeof"() <{args = [i32]}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK-NEXT: call_opaque "memcpy"(%arg4, %[[RESPTR]], %[[RESHOSTSIZE]])
// Return ok status.
@@ -677,7 +677,7 @@
// Calculate the size of the arguments (with alignment padding for refs).
// CHECK: %[[ARGSIZE0:.+]] = "emitc.constant"() <{value = #emitc.opaque<"0">}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK: call_opaque "iree_host_align"
- // CHECK: %[[ARGSIZE1:.+]] = call_opaque "sizeof"() {args = [!emitc.opaque<"iree_vm_ref_t">]}
+ // CHECK: %[[ARGSIZE1:.+]] = call_opaque "sizeof"() <{args = [!emitc.opaque<"iree_vm_ref_t">]}>
// CHECK: %[[ARGSIZE_PRE:.+]] = add %{{.+}}, %[[ARGSIZE1]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
// CHECK: %[[ARGSIZE:.+]] = call_opaque "iree_host_align"(%[[ARGSIZE_PRE]]
@@ -685,7 +685,7 @@
// Calculate the size of the result (with alignment padding for refs).
// CHECK: %[[RESULTSIZE0:.+]] = "emitc.constant"() <{value = #emitc.opaque<"0">}> : () -> !emitc.opaque<"iree_host_size_t">
// CHECK: call_opaque "iree_host_align"
- // CHECK: %[[RESULTSIZE1:.+]] = call_opaque "sizeof"() {args = [!emitc.opaque<"iree_vm_ref_t">]}
+ // CHECK: %[[RESULTSIZE1:.+]] = call_opaque "sizeof"() <{args = [!emitc.opaque<"iree_vm_ref_t">]}>
// CHECK: %[[RESULTSIZE_PRE:.+]] = add %{{.+}}, %[[RESULTSIZE1]]
// CHECK-SAME: : (!emitc.opaque<"iree_host_size_t">, !emitc.opaque<"iree_host_size_t">) -> !emitc.opaque<"iree_host_size_t">
// CHECK: %[[RESULTSIZE:.+]] = call_opaque "iree_host_align"(%[[RESULTSIZE_PRE]]
@@ -707,7 +707,7 @@
// CHECK-NEXT: assign %[[ARGSIZE]] : !emitc.opaque<"iree_host_size_t"> to %[[ARGSDATALENGTH]] : <!emitc.opaque<"iree_host_size_t">>
// CHECK-NEXT: %[[ARGSDATA:.+]] = "emitc.member"(%[[ARGBYTESPAN_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: assign %[[ARGBYTESPANDATA]] : !emitc.ptr<ui8> to %[[ARGSDATA]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "memset"(%[[ARGBYTESPANDATA]], %[[ARGSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]}
+ // CHECK-NEXT: call_opaque "memset"(%[[ARGBYTESPANDATA]], %[[ARGSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}>
// Allocate space for the result.
// CHECK-NEXT: %[[RESBYTESPAN_MEMBER:.+]] = "emitc.member"(%[[ARGSTRUCT]]) <{member = "results"}> : (!emitc.lvalue<!emitc.opaque<"iree_vm_function_call_t">>) -> !emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>
@@ -717,7 +717,7 @@
// CHECK-NEXT: assign %[[RESULTSIZE]] : !emitc.opaque<"iree_host_size_t"> to %[[RESSDATALENGTH]] : <!emitc.opaque<"iree_host_size_t">>
// CHECK-NEXT: %[[RESSDATA:.+]] = "emitc.member"(%[[RESBYTESPAN_MEMBER]]) <{member = "data"}> : (!emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: assign %[[RESBYTESPANDATA]] : !emitc.ptr<ui8> to %[[RESSDATA]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "memset"(%[[RESBYTESPANDATA]], %[[RESULTSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]}
+ // CHECK-NEXT: call_opaque "memset"(%[[RESBYTESPANDATA]], %[[RESULTSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}>
// Pack the argument into the struct (with pointer alignment).
// CHECK: %[[ARGS:.+]] = "emitc.member"(%[[ARGSTRUCT]]) <{member = "arguments"}> : (!emitc.lvalue<!emitc.opaque<"iree_vm_function_call_t">>) -> !emitc.lvalue<!emitc.opaque<"iree_byte_span_t">>
@@ -827,8 +827,8 @@
// Create duplicate ref for
// CHECK-NEXT: %[[REF:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>
// CHECK-NEXT: %[[REFPTR:.+]] = apply "&"(%[[REF]]) : (!emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>
- // CHECK-NEXT: %[[REFSIZE:.+]] = call_opaque "sizeof"() {args = [!emitc.opaque<"iree_vm_ref_t">]} : () -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: call_opaque "memset"(%[[REFPTR]], %[[REFSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]} : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> ()
+ // CHECK-NEXT: %[[REFSIZE:.+]] = call_opaque "sizeof"() <{args = [!emitc.opaque<"iree_vm_ref_t">]}> : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: call_opaque "memset"(%[[REFPTR]], %[[REFSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}> : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> ()
// CHECK-NEXT: call_opaque "iree_vm_ref_move"(%arg4, %[[REFPTR]]) : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> ()
// CHECK-NEXT: call_opaque "iree_vm_ref_move"(%[[REFPTR]], %arg6) : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> ()
@@ -927,15 +927,15 @@
// Allocate ref variable for argument.
// CHECK-NEXT: %[[ARGREF:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>
// CHECK-NEXT: %[[ARGREFPTR:.+]] = apply "&"(%[[ARGREF]]) : (!emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>
- // CHECK-NEXT: %[[ARGREFSIZE:.+]] = call_opaque "sizeof"() {args = [!emitc.opaque<"iree_vm_ref_t">]} : () -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: call_opaque "memset"(%[[ARGREFPTR]], %[[ARGREFSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]} : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> ()
+ // CHECK-NEXT: %[[ARGREFSIZE:.+]] = call_opaque "sizeof"() <{args = [!emitc.opaque<"iree_vm_ref_t">]}> : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: call_opaque "memset"(%[[ARGREFPTR]], %[[ARGREFSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}> : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> ()
// CHECK-NEXT: call_opaque "iree_vm_ref_assign"(%arg3, %[[ARGREFPTR]]) : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> ()
// Allocate ref variable for result.
// CHECK-NEXT: %[[RESREF:.+]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>
// CHECK-NEXT: %[[RESREFPTR:.+]] = apply "&"(%[[RESREF]]) : (!emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>
- // CHECK-NEXT: %[[RESREFSIZE:.+]] = call_opaque "sizeof"() {args = [!emitc.opaque<"iree_vm_ref_t">]} : () -> !emitc.opaque<"iree_host_size_t">
- // CHECK-NEXT: call_opaque "memset"(%[[RESREFPTR]], %[[RESREFSIZE]]) {args = [0 : index, 0 : ui32, 1 : index]} : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> ()
+ // CHECK-NEXT: %[[RESREFSIZE:.+]] = call_opaque "sizeof"() <{args = [!emitc.opaque<"iree_vm_ref_t">]}> : () -> !emitc.opaque<"iree_host_size_t">
+ // CHECK-NEXT: call_opaque "memset"(%[[RESREFPTR]], %[[RESREFSIZE]]) <{args = [0 : index, 0 : ui32, 1 : index]}> : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> ()
// Call the import.
// CHECK-NEXT: %{{.+}} = call @my_module_call_[[YIELDABLEFN]](%arg0, %[[IMPORT]], %[[ARGREFPTR]], %[[RESREFPTR]])
diff --git a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops.mlir b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops.mlir
index 898fe77..750ca73 100644
--- a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops.mlir
+++ b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops.mlir
@@ -9,7 +9,7 @@
// CHECK-NEXT: assign %arg2 : !emitc.ptr<!emitc.opaque<"struct my_module_state_t">> to %[[STATE_LVAL]] : <!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>
// CHECK-NEXT: %[[RWDATA_LVAL:.+]] = "emitc.member_of_ptr"(%[[STATE_LVAL]]) <{member = "rwdata"}> : (!emitc.lvalue<!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: %[[RWDATA:.+]] = load %[[RWDATA_LVAL]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: %[[RES:.+]] = call_opaque "vm_global_load_i32"(%[[RWDATA]]) {args = [0 : index, 0 : ui32]} : (!emitc.ptr<ui8>) -> i32
+ // CHECK-NEXT: %[[RES:.+]] = call_opaque "vm_global_load_i32"(%[[RWDATA]]) <{args = [0 : index, 0 : ui32]}> : (!emitc.ptr<ui8>) -> i32
%0 = vm.global.load.i32 @c42 : i32
vm.return %0 : i32
}
@@ -26,7 +26,7 @@
// CHECK-NEXT: assign %arg2 : !emitc.ptr<!emitc.opaque<"struct my_module_state_t">> to %[[STATE_LVAL]] : <!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>
// CHECK-NEXT: %[[RWDATA_LVAL:.+]] = "emitc.member_of_ptr"(%[[STATE_LVAL]]) <{member = "rwdata"}> : (!emitc.lvalue<!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: %[[RWDATA:.+]] = load %[[RWDATA_LVAL]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "vm_global_store_i32"(%[[RWDATA]], %arg3) {args = [0 : index, 0 : ui32, 1 : index]} : (!emitc.ptr<ui8>, i32) -> ()
+ // CHECK-NEXT: call_opaque "vm_global_store_i32"(%[[RWDATA]], %arg3) <{args = [0 : index, 0 : ui32, 1 : index]}> : (!emitc.ptr<ui8>, i32) -> ()
vm.global.store.i32 %arg0, @c107_mut : i32
vm.return
}
@@ -47,7 +47,7 @@
// CHECK-NEXT: %[[REF:.+]] = subscript %[[REFS]][%[[REF_INDEX]]] : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> !emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>
// CHECK-NEXT: %[[REF_0:.+]] = apply "&"(%[[REF]]) : (!emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>
// CHECK: %[[C:.+]] = call_opaque "iree_vm_type_def_as_ref"(%{{.+}}) : (!emitc.opaque<"iree_vm_type_def_t">) -> !emitc.opaque<"iree_vm_ref_type_t">
- // CHECK: %{{.+}} = call_opaque "iree_vm_ref_retain_or_move_checked"(%[[REF_0]], %[[C]], %arg3) {args = [false, 0 : index, 1 : index, 2 : index]} : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_vm_ref_type_t">, !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.opaque<"iree_status_t">
+ // CHECK: %{{.+}} = call_opaque "iree_vm_ref_retain_or_move_checked"(%[[REF_0]], %[[C]], %arg3) <{args = [false, 0 : index, 1 : index, 2 : index]}> : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_vm_ref_type_t">, !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.opaque<"iree_status_t">
%0 = vm.global.load.ref @g0 : !vm.buffer
vm.return %0 : !vm.buffer
}
@@ -68,7 +68,7 @@
// CHECK-NEXT: %[[REF:.+]] = subscript %[[REFS]][%[[REF_INDEX]]] : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_host_size_t">) -> !emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>
// CHECK-NEXT: %[[REF_0:.+]] = apply "&"(%[[REF]]) : (!emitc.lvalue<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>
// CHECK: %[[C:.+]] = call_opaque "iree_vm_type_def_as_ref"(%{{.+}}) : (!emitc.opaque<"iree_vm_type_def_t">) -> !emitc.opaque<"iree_vm_ref_type_t">
- // CHECK: %{{.+}} = call_opaque "iree_vm_ref_retain_or_move_checked"(%arg3, %[[C]], %[[REF_0]]) {args = [false, 0 : index, 1 : index, 2 : index]} : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_vm_ref_type_t">, !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.opaque<"iree_status_t">
+ // CHECK: %{{.+}} = call_opaque "iree_vm_ref_retain_or_move_checked"(%arg3, %[[C]], %[[REF_0]]) <{args = [false, 0 : index, 1 : index, 2 : index]}> : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>, !emitc.opaque<"iree_vm_ref_type_t">, !emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.opaque<"iree_status_t">
vm.global.store.ref %arg0, @g0_mut : !vm.buffer
vm.return
}
diff --git a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops_f32.mlir b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops_f32.mlir
index acfe1ee..9d6bf49 100644
--- a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops_f32.mlir
+++ b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops_f32.mlir
@@ -9,7 +9,7 @@
// CHECK-NEXT: assign %arg2 : !emitc.ptr<!emitc.opaque<"struct my_module_state_t">> to %[[STATE_LVAL]] : <!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>
// CHECK-NEXT: %[[RWDATA_LVAL:.+]] = "emitc.member_of_ptr"(%[[STATE_LVAL]]) <{member = "rwdata"}> : (!emitc.lvalue<!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: %[[RWDATA:.+]] = load %[[RWDATA_LVAL]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: %[[RES:.+]] = call_opaque "vm_global_load_f32"(%[[RWDATA]]) {args = [0 : index, 0 : ui32]} : (!emitc.ptr<ui8>) -> f32
+ // CHECK-NEXT: %[[RES:.+]] = call_opaque "vm_global_load_f32"(%[[RWDATA]]) <{args = [0 : index, 0 : ui32]}> : (!emitc.ptr<ui8>) -> f32
%0 = vm.global.load.f32 @c42 : f32
vm.return %0 : f32
}
@@ -26,7 +26,7 @@
// CHECK-NEXT: assign %arg2 : !emitc.ptr<!emitc.opaque<"struct my_module_state_t">> to %[[STATE_LVAL]] : <!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>
// CHECK-NEXT: %[[RWDATA_LVAL:.+]] = "emitc.member_of_ptr"(%[[STATE_LVAL]]) <{member = "rwdata"}> : (!emitc.lvalue<!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: %[[RWDATA:.+]] = load %[[RWDATA_LVAL]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "vm_global_store_f32"(%[[RWDATA]], %arg3) {args = [0 : index, 0 : ui32, 1 : index]} : (!emitc.ptr<ui8>, f32) -> ()
+ // CHECK-NEXT: call_opaque "vm_global_store_f32"(%[[RWDATA]], %arg3) <{args = [0 : index, 0 : ui32, 1 : index]}> : (!emitc.ptr<ui8>, f32) -> ()
vm.global.store.f32 %arg0, @c107_mut : f32
vm.return
}
diff --git a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops_i64.mlir b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops_i64.mlir
index fd04bbe..a9d4425 100644
--- a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops_i64.mlir
+++ b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/global_ops_i64.mlir
@@ -9,7 +9,7 @@
// CHECK-NEXT: assign %arg2 : !emitc.ptr<!emitc.opaque<"struct my_module_state_t">> to %[[STATE_LVAL]] : <!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>
// CHECK-NEXT: %[[RWDATA_LVAL:.+]] = "emitc.member_of_ptr"(%[[STATE_LVAL]]) <{member = "rwdata"}> : (!emitc.lvalue<!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: %[[RWDATA:.+]] = load %[[RWDATA_LVAL]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: %[[RES:.+]] = call_opaque "vm_global_load_i64"(%[[RWDATA]]) {args = [0 : index, 0 : ui32]} : (!emitc.ptr<ui8>) -> i64
+ // CHECK-NEXT: %[[RES:.+]] = call_opaque "vm_global_load_i64"(%[[RWDATA]]) <{args = [0 : index, 0 : ui32]}> : (!emitc.ptr<ui8>) -> i64
%0 = vm.global.load.i64 @c42 : i64
vm.return %0 : i64
}
@@ -26,7 +26,7 @@
// CHECK-NEXT: assign %arg2 : !emitc.ptr<!emitc.opaque<"struct my_module_state_t">> to %[[STATE_LVAL]] : <!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>
// CHECK-NEXT: %[[RWDATA_LVAL:.+]] = "emitc.member_of_ptr"(%[[STATE_LVAL]]) <{member = "rwdata"}> : (!emitc.lvalue<!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>) -> !emitc.lvalue<!emitc.ptr<ui8>>
// CHECK-NEXT: %[[RWDATA:.+]] = load %[[RWDATA_LVAL]] : <!emitc.ptr<ui8>>
- // CHECK-NEXT: call_opaque "vm_global_store_i64"(%[[RWDATA]], %arg3) {args = [0 : index, 0 : ui32, 1 : index]} : (!emitc.ptr<ui8>, i64) -> ()
+ // CHECK-NEXT: call_opaque "vm_global_store_i64"(%[[RWDATA]], %arg3) <{args = [0 : index, 0 : ui32, 1 : index]}> : (!emitc.ptr<ui8>, i64) -> ()
vm.global.store.i64 %arg0, @c107_mut : i64
vm.return
}
diff --git a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/list_ops.mlir b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/list_ops.mlir
index 772c842..0c19a95 100644
--- a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/list_ops.mlir
+++ b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/list_ops.mlir
@@ -10,7 +10,7 @@
// CHECK-DAG: %[[ALLOCATOR_LVAL:.+]] = "emitc.member_of_ptr"(%[[STATE_LVAL]]) <{member = "allocator"}> : (!emitc.lvalue<!emitc.ptr<!emitc.opaque<"struct my_module_state_t">>>) -> !emitc.lvalue<!emitc.opaque<"iree_allocator_t">>
// CHECK-DAG: %[[ALLOCATOR:.+]] = load %[[ALLOCATOR_LVAL]] : <!emitc.opaque<"iree_allocator_t">>
- // CHECK: %[[TYPE_DEF:.+]] = call_opaque "iree_vm_make_value_type_def"() {args = [#emitc.opaque<"IREE_VM_VALUE_TYPE_I32">]} : () -> !emitc.opaque<"iree_vm_type_def_t">
+ // CHECK: %[[TYPE_DEF:.+]] = call_opaque "iree_vm_make_value_type_def"() <{args = [#emitc.opaque<"IREE_VM_VALUE_TYPE_I32">]}> : () -> !emitc.opaque<"iree_vm_type_def_t">
// CHECK-NEXT: %[[STATUS:.+]] = call_opaque "iree_vm_list_create"(%[[TYPE_DEF]], %arg3, %[[ALLOCATOR]], %[[LIST_PTR]]) : (!emitc.opaque<"iree_vm_type_def_t">, i32, !emitc.opaque<"iree_allocator_t">, !emitc.ptr<!emitc.ptr<!emitc.opaque<"iree_vm_list_t">>>) -> !emitc.opaque<"iree_status_t">
// CHECK: %[[LIST_TYPE_ID:.+]] = call_opaque "iree_vm_list_type"() : () -> !emitc.opaque<"iree_vm_ref_type_t">
@@ -70,7 +70,7 @@
// CHECK-NEXT: %1 = apply "&"(%0) : (!emitc.lvalue<!emitc.opaque<"iree_vm_value_t">>) -> !emitc.ptr<!emitc.opaque<"iree_vm_value_t">>
// CHECK-NEXT: %2 = apply "*"(%arg3) : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.opaque<"iree_vm_ref_t">
// CHECK-NEXT: %3 = call_opaque "iree_vm_list_deref"(%2) : (!emitc.opaque<"iree_vm_ref_t">) -> !emitc.ptr<!emitc.opaque<"iree_vm_list_t">>
- // CHECK: %{{.+}} = call_opaque "iree_vm_list_get_value_as"(%3, %arg4, %1) {args = [0 : index, 1 : index, #emitc.opaque<"IREE_VM_VALUE_TYPE_I32">, 2 : index]} : (!emitc.ptr<!emitc.opaque<"iree_vm_list_t">>, i32, !emitc.ptr<!emitc.opaque<"iree_vm_value_t">>) -> !emitc.opaque<"iree_status_t">
+ // CHECK: %{{.+}} = call_opaque "iree_vm_list_get_value_as"(%3, %arg4, %1) <{args = [0 : index, 1 : index, #emitc.opaque<"IREE_VM_VALUE_TYPE_I32">, 2 : index]}> : (!emitc.ptr<!emitc.opaque<"iree_vm_list_t">>, i32, !emitc.ptr<!emitc.opaque<"iree_vm_value_t">>) -> !emitc.opaque<"iree_status_t">
%0 = vm.list.get.i32 %arg0, %arg1 : (!vm.list<i32>, i32) -> i32
vm.return %0 : i32
}
diff --git a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/list_ops_i64.mlir b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/list_ops_i64.mlir
index 15d9da4..fb0d6ac 100644
--- a/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/list_ops_i64.mlir
+++ b/compiler/src/iree/compiler/Dialect/VM/Conversion/VMToEmitC/test/list_ops_i64.mlir
@@ -7,7 +7,7 @@
// CHECK-NEXT: %1 = apply "&"(%0) : (!emitc.lvalue<!emitc.opaque<"iree_vm_value_t">>) -> !emitc.ptr<!emitc.opaque<"iree_vm_value_t">>
// CHECK-NEXT: %2 = apply "*"(%arg3) : (!emitc.ptr<!emitc.opaque<"iree_vm_ref_t">>) -> !emitc.opaque<"iree_vm_ref_t">
// CHECK-NEXT: %3 = call_opaque "iree_vm_list_deref"(%2) : (!emitc.opaque<"iree_vm_ref_t">) -> !emitc.ptr<!emitc.opaque<"iree_vm_list_t">>
- // CHECK: %{{.+}} = call_opaque "iree_vm_list_get_value_as"(%3, %arg4, %1) {args = [0 : index, 1 : index, #emitc.opaque<"IREE_VM_VALUE_TYPE_I64">, 2 : index]} : (!emitc.ptr<!emitc.opaque<"iree_vm_list_t">>, i32, !emitc.ptr<!emitc.opaque<"iree_vm_value_t">>) -> !emitc.opaque<"iree_status_t">
+ // CHECK: %{{.+}} = call_opaque "iree_vm_list_get_value_as"(%3, %arg4, %1) <{args = [0 : index, 1 : index, #emitc.opaque<"IREE_VM_VALUE_TYPE_I64">, 2 : index]}> : (!emitc.ptr<!emitc.opaque<"iree_vm_list_t">>, i32, !emitc.ptr<!emitc.opaque<"iree_vm_value_t">>) -> !emitc.opaque<"iree_status_t">
%0 = vm.list.get.i64 %arg0, %arg1 : (!vm.list<i64>, i32) -> i64
vm.return %0 : i64
}
diff --git a/compiler/src/iree/compiler/DispatchCreation/test/dispatch_linalg_on_tensors.mlir b/compiler/src/iree/compiler/DispatchCreation/test/dispatch_linalg_on_tensors.mlir
index e9b29a4..127e645 100644
--- a/compiler/src/iree/compiler/DispatchCreation/test/dispatch_linalg_on_tensors.mlir
+++ b/compiler/src/iree/compiler/DispatchCreation/test/dispatch_linalg_on_tensors.mlir
@@ -673,11 +673,9 @@
// CHECK-DAG: %[[C9:.+]] = arith.constant 9 : i32
// CHECK-DAG: %[[ARG4V:.+]] = iree_tensor_ext.dispatch.tensor.load %[[ARG3]]
// CHECK-DAG: %[[EXTRACT:.+]] = tensor.extract %[[ARG4V]]
-// CHECK-DAG: %[[CMP1:.+]] = arith.cmpi slt, %[[EXTRACT]]
-// CHECK-DAG: %[[SELECT1:.+]] = arith.select %[[CMP1]], %[[EXTRACT]], %[[C9]]
-// CHECK-DAG: %[[CMP2:.+]] = arith.cmpi sgt, %[[SELECT1]], %[[C0]]
-// CHECK-DAG: %[[SELECT2:.+]] = arith.select %[[CMP2]], %[[SELECT1]], %[[C0]]
-// CHECK-DAG: %[[INDEX_CAST:.+]] = arith.index_cast %[[SELECT2]]
+// CHECK-DAG: %[[MIN:.+]] = arith.minsi %[[EXTRACT]], %[[C9]]
+// CHECK-DAG: %[[MAX:.+]] = arith.maxsi %[[MIN]], %[[C0]]
+// CHECK-DAG: %[[INDEX_CAST:.+]] = arith.index_cast %[[MAX]]
// CHECK-DAG: %[[SLICE:.+]] = iree_tensor_ext.dispatch.tensor.load %[[ARG4]], offsets = [%[[INDEX_CAST]]]
// CHECK: %[[GENERIC:.+]] = linalg.generic
// CHECK-SAME: ins(%[[SLICE]] : tensor<9xi32>)
@@ -720,14 +718,12 @@
// CHECK: %[[LEAF2:.+]] = iree_tensor_ext.dispatch.tensor.load %[[ARG2]]
// CHECK: %[[INIT:.+]] = tensor.empty() : tensor<i16>
// CHECK: %[[OP1:.+]] = tensor.extract %[[LEAF2]][] : tensor<i32>
-// CHECK: %[[OP2:.+]] = arith.cmpi slt, %[[OP1]], %[[C3]] : i32
-// CHECK: %[[OP3:.+]] = arith.select %[[OP2]], %[[OP1]], %[[C3]] : i32
-// CHECK: %[[OP4:.+]] = arith.cmpi sgt, %[[OP3]], %[[C0]] : i32
-// CHECK: %[[OP5:.+]] = arith.select %[[OP4]], %[[OP3]], %[[C0]] : i32
-// CHECK: %[[OP6:.+]] = arith.index_cast %[[OP5]] : i32 to index
-// CHECK: %[[OP7:.+]] = iree_tensor_ext.dispatch.tensor.load %[[ARG3]], offsets = [%[[OP6]]]
+// CHECK: %[[OP2:.+]] = arith.minsi %[[OP1]], %[[C3]] : i32
+// CHECK: %[[OP3:.+]] = arith.maxsi %[[OP2]], %[[C0]] : i32
+// CHECK: %[[OP4:.+]] = arith.index_cast %[[OP3]] : i32 to index
+// CHECK: %[[OP5:.+]] = iree_tensor_ext.dispatch.tensor.load %[[ARG3]], offsets = [%[[OP4]]]
// CHECK: %[[RES:.+]] = linalg.generic
-// CHECK-SAME: ins(%[[OP7]] : tensor<i32>)
+// CHECK-SAME: ins(%[[OP5]] : tensor<i32>)
// CHECK-SAME: outs(%[[INIT]] : tensor<i16>) {
// CHECK: ^bb0(%[[ARG5:.+]]: i32, %{{.+}}: i16):
// CHECK: %[[TRUNC:.+]] = arith.trunci %[[ARG5]] : i32 to i16
@@ -812,14 +808,10 @@
// CHECK-SAME: %[[DEST_CAPTURE:[a-zA-Z0-9_]+]]: !iree_tensor_ext.dispatch.tensor<writeonly:tensor<1x?xi32>>
// CHECK-DAG: iree_tensor_ext.dispatch.tensor.load %[[ARG2_CAPTURE]]
// CHECK-DAG: iree_tensor_ext.dispatch.tensor.load %[[ARG1_CAPTURE]]
-// CHECK-DAG: cmpi
-// CHECK-DAG: arith.select
-// CHECK-DAG: cmpi
-// CHECK-DAG: arith.select
-// CHECK-DAG: cmpi
-// CHECK-DAG: cmpi
-// CHECK-DAG: arith.select
-// CHECK-DAG: arith.select
+// CHECK-DAG: arith.minsi
+// CHECK-DAG: arith.minsi
+// CHECK-DAG: arith.maxsi
+// CHECK-DAG: arith.maxsi
// CHECK-DAG: index_cast
// CHECK-DAG: index_cast
// CHECK: iree_tensor_ext.dispatch.tensor.load %[[ARG0_CAPTURE]]
diff --git a/compiler/src/iree/compiler/ExternalInterfaces/TensorExtExternalModels.cpp b/compiler/src/iree/compiler/ExternalInterfaces/TensorExtExternalModels.cpp
index 75f65c1..e3526ee 100644
--- a/compiler/src/iree/compiler/ExternalInterfaces/TensorExtExternalModels.cpp
+++ b/compiler/src/iree/compiler/ExternalInterfaces/TensorExtExternalModels.cpp
@@ -78,7 +78,8 @@
return emitError() << "could not infer memory space";
}
return cast<bufferization::BufferLikeType>(
- getMemRefType(tensorType, options, /*layout=*/{}, *memSpace));
+ bufferization::getMemRefTypeWithStaticIdentityLayout(tensorType,
+ *memSpace));
}
LogicalResult verifyCompatibleBufferType(
diff --git a/compiler/src/iree/compiler/Reducer/Framework/ChunkManager.h b/compiler/src/iree/compiler/Reducer/Framework/ChunkManager.h
index 11a7daa..77dd432 100644
--- a/compiler/src/iree/compiler/Reducer/Framework/ChunkManager.h
+++ b/compiler/src/iree/compiler/Reducer/Framework/ChunkManager.h
@@ -62,16 +62,6 @@
template <>
struct DenseMapInfo<Chunk> {
- static inline Chunk getEmptyKey() {
- return Chunk(DenseMapInfo<unsigned>::getEmptyKey(),
- DenseMapInfo<unsigned>::getEmptyKey());
- }
-
- static inline Chunk getTombstoneKey() {
- return Chunk(DenseMapInfo<unsigned>::getTombstoneKey(),
- DenseMapInfo<unsigned>::getTombstoneKey());
- }
-
static unsigned getHashValue(const Chunk &val) {
std::pair<unsigned, unsigned> pair(val.getBegin(), val.getEnd());
return DenseMapInfo<std::pair<unsigned, unsigned>>::getHashValue(pair);
diff --git a/tests/external/iree-test-suites/onnx_ops/onnx_ops_gpu_vulkan_rdna3_O0.json b/tests/external/iree-test-suites/onnx_ops/onnx_ops_gpu_vulkan_rdna3_O0.json
index 7bc29bd..78de724 100644
--- a/tests/external/iree-test-suites/onnx_ops/onnx_ops_gpu_vulkan_rdna3_O0.json
+++ b/tests/external/iree-test-suites/onnx_ops/onnx_ops_gpu_vulkan_rdna3_O0.json
@@ -30,15 +30,10 @@
"onnx/node/generated/test_basic_deform_conv_without_padding",
"onnx/node/generated/test_bernoulli_seed",
"onnx/node/generated/test_bernoulli_seed_expanded",
- "onnx/node/generated/test_center_crop_pad_crop",
- "onnx/node/generated/test_center_crop_pad_crop_and_pad",
"onnx/node/generated/test_center_crop_pad_crop_and_pad_expanded",
- "onnx/node/generated/test_center_crop_pad_crop_axes_chw",
"onnx/node/generated/test_center_crop_pad_crop_axes_chw_expanded",
- "onnx/node/generated/test_center_crop_pad_crop_axes_hwc",
"onnx/node/generated/test_center_crop_pad_crop_axes_hwc_expanded",
"onnx/node/generated/test_center_crop_pad_crop_expanded",
- "onnx/node/generated/test_center_crop_pad_crop_negative_axes_hwc",
"onnx/node/generated/test_center_crop_pad_crop_negative_axes_hwc_expanded",
"onnx/node/generated/test_center_crop_pad_pad",
"onnx/node/generated/test_center_crop_pad_pad_expanded",
@@ -93,13 +88,9 @@
"onnx/node/generated/test_lppool_2d_dilations",
"onnx/node/generated/test_lppool_2d_same_lower",
"onnx/node/generated/test_lppool_2d_same_upper",
- "onnx/node/generated/test_max_uint16",
- "onnx/node/generated/test_max_uint8",
"onnx/node/generated/test_maxpool_with_argmax_2d_precomputed_strides",
"onnx/node/generated/test_maxunpool_export_with_output_shape",
"onnx/node/generated/test_maxunpool_export_without_output_shape",
- "onnx/node/generated/test_min_uint16",
- "onnx/node/generated/test_min_uint8",
"onnx/node/generated/test_mod_int64_fmod",
"onnx/node/generated/test_mod_mixed_sign_int64",
"onnx/node/generated/test_mod_uint64",
diff --git a/third_party/llvm-project b/third_party/llvm-project
index c4484e8..917117c 160000
--- a/third_party/llvm-project
+++ b/third_party/llvm-project
@@ -1 +1 @@
-Subproject commit c4484e8422745ab8c1ada25a6bda5d69ef8da924
+Subproject commit 917117ceeebf004dff4b0b430de133c354f236ba
diff --git a/third_party/stablehlo b/third_party/stablehlo
index 28549ef..a2727e5 160000
--- a/third_party/stablehlo
+++ b/third_party/stablehlo
@@ -1 +1 @@
-Subproject commit 28549ef559c29ae488b9d9dcea7dc2fbd107ca9a
+Subproject commit a2727e576ec6f18acc561333dfd70ef49d5f1cdf
diff --git a/third_party/torch-mlir b/third_party/torch-mlir
index 7a0cd11..44b938e 160000
--- a/third_party/torch-mlir
+++ b/third_party/torch-mlir
@@ -1 +1 @@
-Subproject commit 7a0cd1175bedb003f115a4654c1a17504408d75c
+Subproject commit 44b938e7baaed081e17383fbbb9a34ec702f4270
