Bump to llvm/llvm-project@3f1486f (#19683)
## New changes
- We're starting to pick up TOSA dialect v1.0 changes
https://github.com/llvm/llvm-project/commit/360a03c980e3e96ac53746b118a04305a28a5310
and
https://github.com/llvm/llvm-project/commit/c1d01b2fc2932ca3ae6fb81a978f260298dbf343
. These are breaking changes so existing TOSA `.mlir[bc]` files may not
work with new compiler versions. These changes will also be propagating
to framework exporters/importers like TensorFlow over time, so more
breaks are expected. The `iree-import-tflite` tool now reports a warning
if a known-incompatible version of tensorflow is installed.
## Reverts
RISC-V backend
-
https://github.com/llvm/llvm-project/commit/169c32eb49fa9b559d388b9b8f4374ff9e1be9be
Python related changes
-
https://github.com/llvm/llvm-project/commit/5cd427477218d8bdb659c6c53a7758f741c3990a
-
https://github.com/llvm/llvm-project/commit/08e2c15a287df132ca2186f2d56669219a7ed8a1
-
https://github.com/llvm/llvm-project/commit/b56d1ec6cb8b5cb3ff46cba39a1049ecf3831afb
-
https://github.com/llvm/llvm-project/commit/a0f5bbcfb71a28cd3eaa308250af63a0889a1c85
NVPTX changes
-
https://github.com/llvm/llvm-project/commit/29b5c18e466cea867e9e785e650d9ec2e5c295b9
-
https://github.com/llvm/llvm-project/commit/e7a83fc74db78445c36a27f113e9b045f90f699a
## Updates to Torch-MLIR
- Fix Conv2D create methods
https://github.com/iree-org/torch-mlir/tree/integrate/20250112 (to be
upstream to Torch-MLIR)
---------
Signed-off-by: MaheshRavishankar <mahesh.ravishankar@gmail.com>
Signed-off-by: Krzysztof Drewniak <Krzysztof.Drewniak@amd.com>
Signed-off-by: Scott Todd <scott.todd0@gmail.com>
Co-authored-by: Scott Todd <scott.todd0@gmail.com>
Co-authored-by: Krzysztof Drewniak <Krzysztof.Drewniak@amd.com>
diff --git a/compiler/src/iree/compiler/Codegen/Interfaces/BUILD.bazel b/compiler/src/iree/compiler/Codegen/Interfaces/BUILD.bazel
index 8128d8c..eefbade 100644
--- a/compiler/src/iree/compiler/Codegen/Interfaces/BUILD.bazel
+++ b/compiler/src/iree/compiler/Codegen/Interfaces/BUILD.bazel
@@ -62,6 +62,7 @@
"@llvm-project//mlir:AMDGPUDialect",
"@llvm-project//mlir:ArithValueBoundsOpInterfaceImpl",
"@llvm-project//mlir:BufferizationTransformOps",
+ "@llvm-project//mlir:GPUDialect",
"@llvm-project//mlir:GPUTransformOps",
"@llvm-project//mlir:LinalgDialect",
"@llvm-project//mlir:LinalgTransformOps",
diff --git a/compiler/src/iree/compiler/Codegen/Interfaces/CMakeLists.txt b/compiler/src/iree/compiler/Codegen/Interfaces/CMakeLists.txt
index c3333af..88d454f 100644
--- a/compiler/src/iree/compiler/Codegen/Interfaces/CMakeLists.txt
+++ b/compiler/src/iree/compiler/Codegen/Interfaces/CMakeLists.txt
@@ -28,6 +28,7 @@
MLIRAffineTransformOps
MLIRArithValueBoundsOpInterfaceImpl
MLIRBufferizationTransformOps
+ MLIRGPUDialect
MLIRGPUTransformOps
MLIRIR
MLIRLinalgDialect
diff --git a/compiler/src/iree/compiler/Codegen/Interfaces/Interfaces.cpp b/compiler/src/iree/compiler/Codegen/Interfaces/Interfaces.cpp
index e8cce7a..8f9f312 100644
--- a/compiler/src/iree/compiler/Codegen/Interfaces/Interfaces.cpp
+++ b/compiler/src/iree/compiler/Codegen/Interfaces/Interfaces.cpp
@@ -23,6 +23,7 @@
#include "mlir/Dialect/Affine/TransformOps/AffineTransformOps.h"
#include "mlir/Dialect/Arith/IR/ValueBoundsOpInterfaceImpl.h"
#include "mlir/Dialect/Bufferization/TransformOps/BufferizationTransformOps.h"
+#include "mlir/Dialect/GPU/IR/ValueBoundsOpInterfaceImpl.h"
#include "mlir/Dialect/GPU/TransformOps/GPUTransformOps.h"
#include "mlir/Dialect/Linalg/IR/ValueBoundsOpInterfaceImpl.h"
#include "mlir/Dialect/Linalg/TransformOps/DialectExtension.h"
@@ -64,6 +65,7 @@
arith::registerValueBoundsOpInterfaceExternalModels(registry);
bufferization::registerTransformDialectExtension(registry);
gpu::registerTransformDialectExtension(registry);
+ gpu::registerValueBoundsOpInterfaceExternalModels(registry);
linalg::registerTransformDialectExtension(registry);
linalg::registerValueBoundsOpInterfaceExternalModels(registry);
linalg::registerSubsetOpInterfaceExternalModels(registry);
diff --git a/compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_matvec.mlir b/compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_matvec.mlir
index d152f28..29c0bc0 100644
--- a/compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_matvec.mlir
+++ b/compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_matvec.mlir
@@ -76,18 +76,18 @@
// CHECK-DAG: %[[CSTVEC4XI32_255:.+]] = spirv.Constant dense<255> : vector<4xi32>
// CHECK-DAG: %[[CSTVEC4XI32_0:.+]] = spirv.Constant dense<0> : vector<4xi32>
-// CHECK-DAG: %[[CSTVEC2XI32_4:.+]] = spirv.Constant dense<4> : vector<2xi32>
-// CHECK-DAG: %[[CSTVEC2XI32_15:.+]] = spirv.Constant dense<15> : vector<2xi32>
+// CHECK-DAG: %[[CSTVEC4XI32_0_4:.+]] = spirv.Constant dense<[0, 4, 0, 4]> : vector<4xi32>
+// CHECK-DAG: %[[CSTVEC4XI32_15__16:.+]] = spirv.Constant dense<[15, -16, 15, -16]> : vector<4xi32>
// CHECK: spirv.mlir.loop
// Load the quantized weight and get 8xi4 out of it.
// CHECK: %[[LOAD:.+]] = spirv.Load "StorageBuffer" %{{.+}} : vector<4xi32>
// CHECK: %[[SHUF01:.+]] = spirv.VectorShuffle [0 : i32, 1 : i32] %[[LOAD]], %[[LOAD]] : vector<4xi32>, vector<4xi32> -> vector<2xi32>
-// CHECK: %[[LOW4:.+]] = spirv.BitwiseAnd %[[SHUF01]], %[[CSTVEC2XI32_15]] : vector<2xi32>
-// CHECK: %[[HIGH4:.+]] = spirv.ShiftRightLogical %[[SHUF01]], %[[CSTVEC2XI32_4]] : vector<2xi32>, vector<2xi32>
-// CHECK: %[[LOW4HIGH4:.+]] = spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32] %[[LOW4]], %[[HIGH4]] : vector<2xi32>, {{.*}} -> vector<4xi32>
-// CHECK: %[[LOW4HIGH4_ZEROUPPER:.+]] = spirv.BitwiseAnd %[[LOW4HIGH4]], %[[CSTVEC4XI32_255]] : vector<4xi32>
+// CHECK: %[[SHUF0011:.+]] = spirv.VectorShuffle [0 : i32, 0 : i32, 1 : i32, 1 : i32] %[[SHUF01]], %[[SHUF01]] : vector<2xi32>, vector<2xi32> -> vector<4xi32>
+// CHECK: %[[MASKED:.+]] = spirv.BitwiseAnd %[[SHUF0011]], %[[CSTVEC4XI32_15__16]] : vector<4xi32>
+// CHECK: %[[SHIFTED:.+]] = spirv.ShiftRightLogical %[[MASKED]], %[[CSTVEC4XI32_0_4]] : vector<4xi32>, vector<4xi32>
+// CHECK: %[[LOW4HIGH4_ZEROUPPER:.+]] = spirv.BitwiseAnd %[[SHIFTED]], %[[CSTVEC4XI32_255]] : vector<4xi32>
// CHECK: %[[SHUF23:.+]] = spirv.VectorShuffle [2 : i32, 3 : i32] %[[LOAD:.+]], %[[LOAD:.+]] : vector<4xi32>, vector<4xi32> -> vector<2xi32>
@@ -186,8 +186,8 @@
// CHECK-DAG: %[[C0:.+]] = spirv.Constant 0 : i32
// CHECK-DAG: %[[CSTVEC4XF16_1:.+]] = spirv.Constant dense<1.000000e+00> : vector<4xf16>
// CHECK-DAG: %[[CSTVEC4XI32_255:.+]] = spirv.Constant dense<255> : vector<4xi32>
-// CHECK-DAG: %[[CSTVEC2XI32_4:.+]] = spirv.Constant dense<4> : vector<2xi32>
-// CHECK-DAG: %[[CSTVEC2XI32_15:.+]] = spirv.Constant dense<15> : vector<2xi32>
+// CHECK-DAG: %[[CSTVEC2XI32_1:.+]] = spirv.Constant dense<[0, 4, 0, 4]> : vector<4xi32>
+// CHECK-DAG: %[[CSTVEC2XI32_2:.+]] = spirv.Constant dense<[15, -16, 15, -16]> : vector<4xi32>
// CHECK: %[[WIDX:.+]] = spirv.CompositeExtract %{{.*}}[0 : i32] : vector<3xi32>
// CHECK: %[[PCPTR:.+]] = spirv.AccessChain %{{.*}}[{{.*}}, %[[C0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<5 x i32, stride=4> [0])>, PushConstant>, i32, i32
@@ -209,8 +209,7 @@
// CHECK: %[[ACCESS:.+]] = spirv.AccessChain %[[RADDR]][{{.*}}, %[[OFFSET]]] : !spirv.ptr<!spirv.struct<(!spirv.rtarray<i32, stride=4> [0])>, StorageBuffer>, i32, i32
// CHECK: spirv.Load "StorageBuffer" %[[ACCESS]] : i32
-// CHECK: spirv.ShiftRightLogical %{{.*}}, %[[CSTVEC2XI32_4]] : vector<2xi32>, vector<2xi32>
-// CHECK: spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32] %{{.*}} : vector<2xi32>, vector<2xi32> -> vector<4xi32>
+// CHECK: spirv.ShiftRightLogical %{{.*}}, %[[CSTVEC2XI32_1]] : vector<4xi32>, vector<4xi32>
// CHECK: spirv.BitwiseAnd %{{.*}}, %[[CSTVEC4XI32_255]] : vector<4xi32>
// CHECK: spirv.ConvertUToF %{{.+}} : vector<4xi32> to vector<4xf16>
diff --git a/compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_sub_byte_dequant.mlir b/compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_sub_byte_dequant.mlir
index c799a0d..40c26bd 100644
--- a/compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_sub_byte_dequant.mlir
+++ b/compiler/src/iree/compiler/Codegen/SPIRV/test/pipeline_sub_byte_dequant.mlir
@@ -44,13 +44,13 @@
// CHECK-LABEL: spirv.func @i4_dequant()
-// CHECK: spirv.VectorShuffle [0 : i32, 1 : i32] {{.*}} : vector<4xi32>, vector<4xi32> -> vector<2xi32>
-// CHECK: spirv.BitwiseAnd
-// CHECK: spirv.ShiftRightLogical
-// CHECK: spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32]
-// CHECK: spirv.BitwiseAnd
+// CHECK: %[[BYTE1:.+]] = spirv.VectorShuffle [0 : i32, 1 : i32] {{.*}} : vector<4xi32>, vector<4xi32> -> vector<2xi32>
+// CHECK: %[[COPIED:.+]] = spirv.VectorShuffle [0 : i32, 0 : i32, 1 : i32, 1 : i32] %[[BYTE1]], %[[BYTE1]] : vector<2xi32>, vector<2xi32> -> vector<4xi32>
+// CHECK: %[[MASKED:.+]] = spirv.BitwiseAnd %[[COPIED]]
+// CHECK: %[[SHIFTED:.+]] = spirv.ShiftRightLogical %[[MASKED]]
+// CHECK: %[[ZEROUPPER:.+]] = spirv.BitwiseAnd %[[SHIFTED]]
// CHECK: spirv.VectorShuffle [2 : i32, 3 : i32] {{.*}} : vector<4xi32>, vector<4xi32> -> vector<2xi32>
-// CHECK-COUNT-3: spirv.VectorShuffle [0 : i32, 2 : i32, 1 : i32, 3 : i32]
+// CHECK-COUNT-3: spirv.VectorShuffle [0 : i32, 0 : i32, 1 : i32, 1 : i32]
// CHECK-COUNT-4: spirv.ConvertUToF {{.+}} : vector<4xi32> to vector<4xf32>
// CHECK-COUNT-4: spirv.FSub
diff --git a/compiler/src/iree/compiler/ExternalInterfaces/BUILD.bazel b/compiler/src/iree/compiler/ExternalInterfaces/BUILD.bazel
index 3016536..ae0370c 100644
--- a/compiler/src/iree/compiler/ExternalInterfaces/BUILD.bazel
+++ b/compiler/src/iree/compiler/ExternalInterfaces/BUILD.bazel
@@ -37,6 +37,7 @@
"//compiler/src/iree/compiler/Dialect/Stream/IR",
"//compiler/src/iree/compiler/Dialect/Util/IR",
"@llvm-project//mlir:ArithDialect",
+ "@llvm-project//mlir:GPUDialect",
"@llvm-project//mlir:IR",
"@llvm-project//mlir:LinalgDialect",
"@llvm-project//mlir:LinalgOpsIncGen",
diff --git a/compiler/src/iree/compiler/ExternalInterfaces/CMakeLists.txt b/compiler/src/iree/compiler/ExternalInterfaces/CMakeLists.txt
index a294e87..f7ef47e 100644
--- a/compiler/src/iree/compiler/ExternalInterfaces/CMakeLists.txt
+++ b/compiler/src/iree/compiler/ExternalInterfaces/CMakeLists.txt
@@ -27,6 +27,7 @@
"UtilExternalModels.cpp"
DEPS
MLIRArithDialect
+ MLIRGPUDialect
MLIRIR
MLIRLinalgDialect
MLIRLinalgOpsIncGenLib
diff --git a/integrations/tensorflow/python_projects/iree_tflite/iree/tools/tflite/scripts/iree_import_tflite/__main__.py b/integrations/tensorflow/python_projects/iree_tflite/iree/tools/tflite/scripts/iree_import_tflite/__main__.py
index 35b2438..a5e6f29 100644
--- a/integrations/tensorflow/python_projects/iree_tflite/iree/tools/tflite/scripts/iree_import_tflite/__main__.py
+++ b/integrations/tensorflow/python_projects/iree_tflite/iree/tools/tflite/scripts/iree_import_tflite/__main__.py
@@ -51,6 +51,19 @@
if args.output_format != "mlir-bytecode":
logging.warning("output-format option is deprecated, emitting MLIR bytecode")
+ # Log compatibility warnings for some known issues.
+ try:
+ from packaging import version
+ from tensorflow import __version__ as tf_version
+
+ # https://discourse.llvm.org/t/rfc-tosa-dialect-increment-to-v1-0/83708
+ if version.parse(tf_version) <= version.parse("2.18.0"):
+ logging.warning(
+ f"Found tensorflow version {tf_version}. Versions of tensorflow<=2.18.0 have known compatibility issues with TOSA v1.0. Consider using a newer tensorflow version or iree-base-compiler<=3.1.0"
+ )
+ except:
+ pass
+
tflite_to_tosa(
flatbuffer=args.flatbuffer,
bytecode=args.output_path,
diff --git a/integrations/tensorflow/test/iree_tfl_tests/gpt2.run b/integrations/tensorflow/test/iree_tfl_tests/gpt2.run
index 4e95ab6..7869cb1 100644
--- a/integrations/tensorflow/test/iree_tfl_tests/gpt2.run
+++ b/integrations/tensorflow/test/iree_tfl_tests/gpt2.run
@@ -1 +1,2 @@
# RUN: %PYTHON -m iree_tfl_tests.gpt2_test --artifacts_dir=%t
+# XFAIL: *
diff --git a/integrations/tensorflow/test/iree_tfl_tests/person_detect.run b/integrations/tensorflow/test/iree_tfl_tests/person_detect.run
index cf8517b..3808b71 100644
--- a/integrations/tensorflow/test/iree_tfl_tests/person_detect.run
+++ b/integrations/tensorflow/test/iree_tfl_tests/person_detect.run
@@ -1 +1,2 @@
# RUN: %PYTHON -m iree_tfl_tests.person_detect_test --artifacts_dir=%t
+# XFAIL: *
diff --git a/integrations/tensorflow/test/iree_tfl_tests/vmvx_person_detect.run b/integrations/tensorflow/test/iree_tfl_tests/vmvx_person_detect.run
index 9ef1adb..69abcf3 100644
--- a/integrations/tensorflow/test/iree_tfl_tests/vmvx_person_detect.run
+++ b/integrations/tensorflow/test/iree_tfl_tests/vmvx_person_detect.run
@@ -1,2 +1,3 @@
# REQUIRES: vmvx
# RUN: %PYTHON -m iree_tfl_tests.person_detect_test --target_backend=vmvx --artifacts_dir=%t
+# XFAIL: *
diff --git a/tests/e2e/tosa_ops/pad.mlir b/tests/e2e/tosa_ops/pad.mlir
index 265024e..6ceefad 100644
--- a/tests/e2e/tosa_ops/pad.mlir
+++ b/tests/e2e/tosa_ops/pad.mlir
@@ -1,23 +1,23 @@
func.func @pad_1D_test() {
%0 = util.unfoldable_constant dense<42> : tensor<2xi32>
- %1 = "tosa.const"() { value = dense<[[3, 2]]> : tensor<1x2xi32> } : () -> (tensor<1x2xi32>)
- %result = tosa.pad %0, %1 : (tensor<2xi32>, tensor<1x2xi32>) -> (tensor<7xi32>)
+ %1 = "tosa.const"() { value = dense<[3, 2]> : tensor<2xi32> } : () -> (tensor<2xi32>)
+ %result = tosa.pad %0, %1 : (tensor<2xi32>, tensor<2xi32>) -> (tensor<7xi32>)
check.expect_eq_const(%result, dense<[0, 0, 0, 42, 42, 0, 0]> : tensor<7xi32>) : tensor<7xi32>
return
}
func.func @pad_2D_test() {
%0 = util.unfoldable_constant dense<42> : tensor<2x2xi32>
- %1 = "tosa.const"() { value = dense<[[1, 1], [1, 1]]> : tensor<2x2xi32> } : () -> (tensor<2x2xi32>)
- %result = tosa.pad %0, %1 : (tensor<2x2xi32>, tensor<2x2xi32>) -> (tensor<4x4xi32>)
+ %1 = "tosa.const"() { value = dense<[1, 1, 1, 1]> : tensor<4xi32> } : () -> (tensor<4xi32>)
+ %result = tosa.pad %0, %1 : (tensor<2x2xi32>, tensor<4xi32>) -> (tensor<4x4xi32>)
check.expect_eq_const(%result, dense<[[0, 0, 0, 0], [0, 42, 42, 0], [0, 42, 42, 0], [0, 0, 0, 0]]> : tensor<4x4xi32>) : tensor<4x4xi32>
return
}
func.func @pad_3D_test() {
%0 = util.unfoldable_constant dense<42> : tensor<1x1x2xi32>
- %1 = "tosa.const"() { value = dense<[[0, 1], [1, 0], [0, 0]]> : tensor<3x2xi32> } : () -> (tensor<3x2xi32>)
- %result = tosa.pad %0, %1 : (tensor<1x1x2xi32>, tensor<3x2xi32>) -> (tensor<2x2x2xi32>)
+ %1 = "tosa.const"() { value = dense<[0, 1, 1, 0, 0, 0]> : tensor<6xi32> } : () -> (tensor<6xi32>)
+ %result = tosa.pad %0, %1 : (tensor<1x1x2xi32>, tensor<6xi32>) -> (tensor<2x2x2xi32>)
check.expect_eq_const(%result, dense<[[[0, 0], [42, 42]], [[0, 0], [0, 0]]]> : tensor<2x2x2xi32>) : tensor<2x2x2xi32>
return
}
diff --git a/third_party/llvm-project b/third_party/llvm-project
index 6a722c2..072c320 160000
--- a/third_party/llvm-project
+++ b/third_party/llvm-project
@@ -1 +1 @@
-Subproject commit 6a722c20b272dac9a0e5a2a27a06587b15adb0a3
+Subproject commit 072c320ee174178efcbe420177b8c6f72858f4ef
diff --git a/third_party/torch-mlir b/third_party/torch-mlir
index f92c587..2debe15 160000
--- a/third_party/torch-mlir
+++ b/third_party/torch-mlir
@@ -1 +1 @@
-Subproject commit f92c587cb6150e73078f32cf847dc3892be16f93
+Subproject commit 2debe153979956e1bb21cb260a7bbbbe6f43dbe0
