[Build] Stop CMake riscv64 defaults from clobbering test cpu-features (#24866) platform cmake defaults were appending --iree-llvmcpu-target-cpu-features= after test variants, so the default overwrote +xsmtvdot / VLEN. this prevents the override of an existing cpu-features flag; prepend missing +m,+a,+f,+d,+c. and strips those from generator --requirements=. Towards: #24859 --------- Signed-off-by: Terence <terrencemahlatini@gmail.com> Co-authored-by: Cursor <cursoragent@cursor.com>
diff --git a/build_tools/cmake/iree_e2e_generated_runner_test.cmake b/build_tools/cmake/iree_e2e_generated_runner_test.cmake index d46ed60..834174e 100644 --- a/build_tools/cmake/iree_e2e_generated_runner_test.cmake +++ b/build_tools/cmake/iree_e2e_generated_runner_test.cmake
@@ -261,6 +261,16 @@ set(_CPU_FEATURES_REGEX "^--iree-llvmcpu-target-cpu-features=") if (_COMPILER_FLAG MATCHES "${_CPU_FEATURES_REGEX}") string(REGEX REPLACE "${_CPU_FEATURES_REGEX}" "" _CPU_FEATURES "${_COMPILER_FLAG}") + # Omit +m,+a,+f,+d,+c; they are not runtime feature bits. + string(REPLACE "," ";" _REQ_LIST "${_CPU_FEATURES}") + set(_REQ_FILTERED "") + foreach(_F IN LISTS _REQ_LIST) + if(_F MATCHES "^\\+[mafdc]$") + continue() + endif() + list(APPEND _REQ_FILTERED "${_F}") + endforeach() + list(JOIN _REQ_FILTERED "," _CPU_FEATURES) list(APPEND _GENERATOR_STANDARD_FLAGS "--requirements=${_CPU_FEATURES}") endif() endforeach()
diff --git a/build_tools/cmake/iree_macros.cmake b/build_tools/cmake/iree_macros.cmake index 62226aa..96430c6 100644 --- a/build_tools/cmake/iree_macros.cmake +++ b/build_tools/cmake/iree_macros.cmake
@@ -693,15 +693,23 @@ NOT IN_FLAGS MATCHES "iree-llvmcpu-target-triple") # RV64 Linux crosscompile toolchain can support iree-compile with # specific CPU flags. Add the llvm flags to support RV64 RVV codegen if - # llvm-target-triple is not specified. - list(APPEND _FLAGS ${RISCV64_TEST_DEFAULT_LLVM_FLAGS}) + # llvm-target-triple is not specified. Skip the default cpu-features flag + # when the test already set one, so it cannot replace the test's VLEN. + list(APPEND _FLAGS ${RISCV64_TEST_DEFAULT_ABI_FLAGS}) + if(NOT IN_FLAGS MATCHES "--iree-llvmcpu-target-cpu-features=") + list(APPEND _FLAGS ${RISCV64_TEST_DEFAULT_FEAT_FLAGS}) + endif() elseif(IREE_ARCH STREQUAL "riscv_32" AND CMAKE_SYSTEM_NAME STREQUAL "Linux" AND NOT IN_FLAGS MATCHES "iree-llvmcpu-target-triple") # RV32 Linux crosscompile toolchain can support iree-compile with # specific CPU flags. Add the llvm flags to support RV32 RVV codegen if - # llvm-target-triple is not specified. - list(APPEND _FLAGS ${RISCV32_TEST_DEFAULT_LLVM_FLAGS}) + # llvm-target-triple is not specified. Skip the default cpu-features flag + # when the test already set one, so it cannot replace the test's VLEN. + list(APPEND _FLAGS ${RISCV32_TEST_DEFAULT_ABI_FLAGS}) + if(NOT IN_FLAGS MATCHES "--iree-llvmcpu-target-cpu-features=") + list(APPEND _FLAGS ${RISCV32_TEST_DEFAULT_FEAT_FLAGS}) + endif() endif() if(EMSCRIPTEN AND NOT IN_FLAGS MATCHES "iree-llvmcpu-target-triple")
diff --git a/build_tools/cmake/linux_riscv32.cmake b/build_tools/cmake/linux_riscv32.cmake index 04d2c08..f350d9c 100644 --- a/build_tools/cmake/linux_riscv32.cmake +++ b/build_tools/cmake/linux_riscv32.cmake
@@ -41,11 +41,13 @@ -Wno-atomic-alignment") set(RISCV_LINKER_FLAGS "-lstdc++ -lpthread -lm -ldl -latomic") set(RISCV_QEMU_CPU_FLAGS "rv32,Zve32f=true,vlen=512,elen=32,vext_spec=v1.0") -set(RISCV32_TEST_DEFAULT_LLVM_FLAGS +set(RISCV32_TEST_DEFAULT_ABI_FLAGS "--iree-llvmcpu-target-triple=riscv32" "--iree-llvmcpu-target-abi=ilp32d" + CACHE INTERNAL "Default llvm triple and ABI flags for testing purposes") +set(RISCV32_TEST_DEFAULT_FEAT_FLAGS "--iree-llvmcpu-target-cpu-features=+m,+a,+f,+d,+zvl512b,+zve32f" - CACHE INTERNAL "Default llvm codegen flags for testing purposes") + CACHE INTERNAL "Default llvm CPU feature flags for testing purposes") set(CMAKE_C_FLAGS "${RISCV_COMPILER_FLAGS} ${CMAKE_C_FLAGS}") set(CMAKE_CXX_FLAGS "${RISCV_COMPILER_FLAGS} ${CMAKE_CXX_FLAGS}")
diff --git a/build_tools/cmake/linux_riscv64.cmake b/build_tools/cmake/linux_riscv64.cmake index 538c210..a537ba1 100644 --- a/build_tools/cmake/linux_riscv64.cmake +++ b/build_tools/cmake/linux_riscv64.cmake
@@ -49,11 +49,13 @@ set(RISCV_COMPILER_FLAGS "\ -march=rv64i2p1ma2p1f2p2d2p2c2p0 -mabi=lp64d") set(RISCV_QEMU_CPU_FLAGS "rv64,Zve64d=true,vlen=512,elen=64,vext_spec=v1.0") -set(RISCV64_TEST_DEFAULT_LLVM_FLAGS +set(RISCV64_TEST_DEFAULT_ABI_FLAGS "--iree-llvmcpu-target-triple=riscv64" "--iree-llvmcpu-target-abi=lp64d" + CACHE INTERNAL "Default llvm triple and ABI flags for testing purposes") +set(RISCV64_TEST_DEFAULT_FEAT_FLAGS "--iree-llvmcpu-target-cpu-features=+m,+a,+f,+d,+c,+zvl512b,+v" - CACHE INTERNAL "Default llvm codegen flags for testing purposes") + CACHE INTERNAL "Default llvm CPU feature flags for testing purposes") set(CMAKE_C_FLAGS_INIT "${RISCV_COMPILER_FLAGS}") set(CMAKE_CXX_FLAGS_INIT "${RISCV_COMPILER_FLAGS}")
diff --git a/tests/e2e/matmul/BUILD.bazel b/tests/e2e/matmul/BUILD.bazel index ef83b21..302a20f 100644 --- a/tests/e2e/matmul/BUILD.bazel +++ b/tests/e2e/matmul/BUILD.bazel
@@ -176,7 +176,7 @@ "arm_64:dotprod:+dotprod", "arm_64:i8mm:+i8mm", "x86_64:avx512vnni:" + ",".join(X86_64_AVX512_VNNI), - "riscv_64:ime:+v,+zvl256b,+xsmtvdot", + "riscv_64:ime:+m,+a,+f,+d,+c,+v,+zvl256b,+xsmtvdot", ] if lhs_rhs_type == "i8" and acc_type == "i32" else [ "x86_64:avx2:" + ",".join(X86_64_AVX2), "x86_64:avx512:" + ",".join(X86_64_AVX512), @@ -473,10 +473,8 @@ target_backends_and_drivers = [ ("llvm-cpu", "local-task"), ], - # The riscv_64: prefix enables this variant only on RISC-V builds; the - # actual RVV cpu features are supplied by the toolchain's default test - # flags, so the features listed here are only a label. - target_cpu_features_variants = ["riscv_64:rvv:+v,+zvl512b"], + # RISC-V only. + target_cpu_features_variants = ["riscv_64:rvv:+m,+a,+f,+d,+c,+v,+zvl512b"], test_runner = "//tools/testing/e2e:iree-e2e-matmul-test", test_type = "matmul", ) for (variant_prefix, extra_compiler_flags) in [
diff --git a/tests/e2e/matmul/CMakeLists.txt b/tests/e2e/matmul/CMakeLists.txt index b521082..70eb424 100644 --- a/tests/e2e/matmul/CMakeLists.txt +++ b/tests/e2e/matmul/CMakeLists.txt
@@ -144,7 +144,7 @@ "arm_64:dotprod:+dotprod" "arm_64:i8mm:+i8mm" "x86_64:avx512vnni:+avx,+avx2,+fma,+f16c,+avx512f,+avx512vl,+avx512cd,+avx512bw,+avx512dq,+avx512vnni" - "riscv_64:ime:+v,+zvl256b,+xsmtvdot" + "riscv_64:ime:+m,+a,+f,+d,+c,+v,+zvl256b,+xsmtvdot" ) iree_generated_e2e_runner_test( @@ -345,7 +345,7 @@ "arm_64:dotprod:+dotprod" "arm_64:i8mm:+i8mm" "x86_64:avx512vnni:+avx,+avx2,+fma,+f16c,+avx512f,+avx512vl,+avx512cd,+avx512bw,+avx512dq,+avx512vnni" - "riscv_64:ime:+v,+zvl256b,+xsmtvdot" + "riscv_64:ime:+m,+a,+f,+d,+c,+v,+zvl256b,+xsmtvdot" ) iree_generated_e2e_runner_test( @@ -1172,7 +1172,7 @@ "--iree-opt-data-tiling" "--iree-llvmcpu-enable-ukernels=none" TARGET_CPU_FEATURES_VARIANTS - "riscv_64:rvv:+v,+zvl512b" + "riscv_64:rvv:+m,+a,+f,+d,+c,+v,+zvl512b" ) iree_generated_e2e_runner_test( @@ -1196,7 +1196,7 @@ "--iree-opt-data-tiling" "--iree-llvmcpu-enable-ukernels=none" TARGET_CPU_FEATURES_VARIANTS - "riscv_64:rvv:+v,+zvl512b" + "riscv_64:rvv:+m,+a,+f,+d,+c,+v,+zvl512b" ) iree_generated_e2e_runner_test( @@ -1221,7 +1221,7 @@ "--iree-llvmcpu-enable-ukernels=none" "--iree-global-opt-enable-early-materialization=false" TARGET_CPU_FEATURES_VARIANTS - "riscv_64:rvv:+v,+zvl512b" + "riscv_64:rvv:+m,+a,+f,+d,+c,+v,+zvl512b" ) iree_generated_e2e_runner_test( @@ -1246,7 +1246,7 @@ "--iree-llvmcpu-enable-ukernels=none" "--iree-global-opt-enable-early-materialization=false" TARGET_CPU_FEATURES_VARIANTS - "riscv_64:rvv:+v,+zvl512b" + "riscv_64:rvv:+m,+a,+f,+d,+c,+v,+zvl512b" ) iree_generated_e2e_runner_test(