[CPU] Vectorize parallel dims for non-AVX512 x86 matmul defaults (#24701)

See GitHub issue: https://github.com/iree-org/iree/issues/24700

`getDefaultMatmulVectorSizes` used `{1, 1, vectorSize}` for non-AVX512
x86, which vectorizes only the reduction (`K`) dim and leaves the
parallel/output dims scalar. This forces a horizontal reduction per
output element and is dramatically slower for f32 matmul_like /
batch_matmul kernels compared to v3.5 (~2.4x end-to-end regression on an
affected model; ~92x on an isolated `512x512x512` matmul at `x86-64-v3`,
`-O1`). Mirror the AArch64/RISC-V defaults by register-blocking the
matmul with `{8, vectorSize, vectorSize}`, vectorizing both parallel
dims (`M` unroll, `N` vector) in addition to `K`.

Numerics are unchanged. As a side effect, dynamic-shape accumulating
GEMMs may now hoist a couple of tiny fixed-size remainder scratch
buffers (`memref.alloca`) from register-blocked peeling; the accumulator
stays in registers and is written directly to the destination (no heap
alloc, no `linalg.generic` copy). The `pipeline_tests.mlir`
accumulating-GEMM guard is relaxed to forbid only heap allocation, and
the `select_x86_64` expected configs are updated `([1, 1, 0] -> [8, 4,
0])`.

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Signed-off-by: Paul Stark <paul.stark@cdprojektred.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>