Integrate llvm-project at 95f0f69f1ff8eff34a00a47a236c2f91a2392c70 (#8860) * Reset third_party/llvm-project: 95f0f69f1ff8eff34a00a47a236c2f91a2392c70 (2022-04-12 11:51:00 +0200): Revert "[AST] Add a new TemplateKind for template decls found via a using decl." MHLO : a41d2b935f15dc98b0e0ec356dd57a96f32cf147 TF : 0f352db4105832d8d2d4f007e9831bd1a7f60ba2 - Replace BitEnumAttr with I32BitEnumAttr. - Fix for bufferization related error (no context more than that for me). - Fix missing header for builtin ops. - Update to new implementation of BranchOpInterface (https://reviews.llvm.org/D123062) - Remove deprecated parseSourceString method. - Fix lit tests to use mlir prefix on print-* flags. - Fix lit tests due to different arith.const ordering. - Fix check-iree-dialects target with - Add missing header file - Replace deprecated `parseSourceString` method - Fix `BranchOpInterface` usage. - Add missing headers to iree_tf_compiler. - Add mlir prefix to flags.
diff --git a/integrations/tensorflow/WORKSPACE b/integrations/tensorflow/WORKSPACE index bbba9c6..33d56e1 100644 --- a/integrations/tensorflow/WORKSPACE +++ b/integrations/tensorflow/WORKSPACE
@@ -7,7 +7,7 @@ load("@bazel_tools//tools/build_defs/repo:git.bzl", "git_repository") -TENSORFLOW_COMMIT = "ac02b22cd1cd0f2c7cf01d0f94c3dc0f53550d62" +TENSORFLOW_COMMIT = "0f352db4105832d8d2d4f007e9831bd1a7f60ba2" git_repository( name = "org_tensorflow",
diff --git a/integrations/tensorflow/iree_tf_compiler/TF/Passes.h b/integrations/tensorflow/iree_tf_compiler/TF/Passes.h index 9e9d6c3..56f8bb5 100644 --- a/integrations/tensorflow/iree_tf_compiler/TF/Passes.h +++ b/integrations/tensorflow/iree_tf_compiler/TF/Passes.h
@@ -8,6 +8,7 @@ #define IREE_INTEGRATIONS_TENSORFLOW_IREE_TF_COMPILER_TF_PASSES_H_ #include "mlir/Dialect/Func/IR/FuncOps.h" +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/integrations/tensorflow/iree_tf_compiler/TFL/PassDetail.h b/integrations/tensorflow/iree_tf_compiler/TFL/PassDetail.h index 5cc38bc..61848c9 100644 --- a/integrations/tensorflow/iree_tf_compiler/TFL/PassDetail.h +++ b/integrations/tensorflow/iree_tf_compiler/TFL/PassDetail.h
@@ -8,6 +8,7 @@ #define IREE_INTEGRATIONS_TENSORFLOW_IREE_TF_COMPILER_TFL_PASS_DETAIL_H_ #include "mlir/Dialect/Func/IR/FuncOps.h" +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/integrations/tensorflow/iree_tf_compiler/TFL/Passes.cpp b/integrations/tensorflow/iree_tf_compiler/TFL/Passes.cpp index 1696f34..7b7d493 100644 --- a/integrations/tensorflow/iree_tf_compiler/TFL/Passes.cpp +++ b/integrations/tensorflow/iree_tf_compiler/TFL/Passes.cpp
@@ -8,6 +8,7 @@ #include "mlir/Conversion/ReconcileUnrealizedCasts/ReconcileUnrealizedCasts.h" #include "mlir/Dialect/Shape/Transforms/Passes.h" +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/PassManager.h" #include "mlir/Pass/PassRegistry.h" #include "mlir/Transforms/Passes.h"
diff --git a/integrations/tensorflow/iree_tf_compiler/TFL/Passes.h b/integrations/tensorflow/iree_tf_compiler/TFL/Passes.h index f04f64d..dd09195 100644 --- a/integrations/tensorflow/iree_tf_compiler/TFL/Passes.h +++ b/integrations/tensorflow/iree_tf_compiler/TFL/Passes.h
@@ -8,6 +8,7 @@ #define IREE_INTEGRATIONS_TENSORFLOW_IREE_TF_COMPILER_TFL_PASSES_H_ #include "mlir/Dialect/Func/IR/FuncOps.h" +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/integrations/tensorflow/iree_tf_compiler/iree-import-xla-main.cpp b/integrations/tensorflow/iree_tf_compiler/iree-import-xla-main.cpp index 9a62e82..976c83d 100644 --- a/integrations/tensorflow/iree_tf_compiler/iree-import-xla-main.cpp +++ b/integrations/tensorflow/iree_tf_compiler/iree-import-xla-main.cpp
@@ -223,7 +223,7 @@ return 1; } sourceMgr.AddNewSourceBuffer(std::move(file), SMLoc()); - module = parseSourceFile(sourceMgr, &context); + module = parseSourceFile<ModuleOp>(sourceMgr, &context); if (!module) return 2; break; }
diff --git a/iree/compiler/Codegen/Common/test/flatten_memref_subspan.mlir b/iree/compiler/Codegen/Common/test/flatten_memref_subspan.mlir index e91cfaf..c493e2b 100644 --- a/iree/compiler/Codegen/Common/test/flatten_memref_subspan.mlir +++ b/iree/compiler/Codegen/Common/test/flatten_memref_subspan.mlir
@@ -299,8 +299,8 @@ // CHECK: #[[MAP:.+]] = affine_map<()[s0, s1, s2] -> (s0 * 42 + s1 + s2 floordiv 4)> // CHECK: func @collapse_shape // CHECK-SAME: (%[[OFFSET:.+]]: index, %[[I0:.+]]: index, %[[I1:.+]]: index) -// CHECK: %[[C0:.+]] = arith.constant 0 : index -// CHECK: %[[SIZE:.+]] = arith.constant 840 : index +// CHECK-DAG: %[[C0:.+]] = arith.constant 0 : index +// CHECK-DAG: %[[SIZE:.+]] = arith.constant 840 : index // CHECK: %[[SUBSPAN:.+]] = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) offset(%[[C0]]) : memref<?xf32>{%[[SIZE]]} // CHECK: %[[INDEX:.+]] = affine.apply #[[MAP]]()[%[[I0]], %[[I1]], %[[OFFSET]]] // CHECK: memref.load %[[SUBSPAN]][%[[INDEX]]] @@ -317,8 +317,8 @@ // CHECK: #[[MAP:.+]] = affine_map<()[s0, s1, s2, s3, s4] -> (s0 * 210 + s1 * 42 + s2 * 7 + s3 + s4 floordiv 4)> // CHECK: func @expand_shape // CHECK-SAME: (%[[OFFSET:.+]]: index, %[[I0:.+]]: index, %[[I1:.+]]: index, %[[I2:.+]]: index, %[[I3:.+]]: index) -// CHECK: %[[C0:.+]] = arith.constant 0 : index -// CHECK: %[[SIZE:.+]] = arith.constant 840 : index +// CHECK-DAG: %[[C0:.+]] = arith.constant 0 : index +// CHECK-DAG: %[[SIZE:.+]] = arith.constant 840 : index // CHECK: %[[SUBSPAN:.+]] = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) offset(%[[C0]]) : memref<?xf32>{%[[SIZE]]} // CHECK: %[[INDEX:.+]] = affine.apply #[[MAP]]()[%[[I0]], %[[I1]], %[[I2]], %[[I3]], %[[OFFSET]]] // CHECK: memref.load %[[SUBSPAN]][%[[INDEX]]] @@ -336,8 +336,8 @@ // CHECK: #[[MAP:.+]] = affine_map<()[s0, s1] -> (s0 + s1 floordiv 4)> // CHECK: func @load_store_rank_one_static_size_subspan_with_offset // CHECK-SAME: %[[OFFSET:.+]]: index, %[[I:.+]]: index -// CHECK: %[[C0:.+]] = arith.constant 0 : index -// CHECK: %[[C32:.+]] = arith.constant 32 : index +// CHECK-DAG: %[[C0:.+]] = arith.constant 0 : index +// CHECK-DAG: %[[C32:.+]] = arith.constant 32 : index // CHECK: %[[SPAN0:.+]] = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) offset(%[[C0]]) : memref<?xf32>{%[[C32]]} // CHECK: %[[SPAN1:.+]] = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) offset(%[[C0]]) : memref<?xf32>{%[[C32]]} // CHECK: %[[I0:.+]] = affine.apply #[[MAP]]()[%[[I]], %[[OFFSET]]]
diff --git a/iree/compiler/ConstEval/PassDetail.h b/iree/compiler/ConstEval/PassDetail.h index 397f60a..e3b8d5d 100644 --- a/iree/compiler/ConstEval/PassDetail.h +++ b/iree/compiler/ConstEval/PassDetail.h
@@ -7,6 +7,7 @@ #ifndef IREE_COMPILER_CONSTEVAL_PASSDETAIL_H_ #define IREE_COMPILER_CONSTEVAL_PASSDETAIL_H_ +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/iree/compiler/ConstEval/Passes.h b/iree/compiler/ConstEval/Passes.h index 4c45886..5330ca7 100644 --- a/iree/compiler/ConstEval/Passes.h +++ b/iree/compiler/ConstEval/Passes.h
@@ -7,6 +7,7 @@ #ifndef IREE_COMPILER_CONSTEVAL_PASSES_H_ #define IREE_COMPILER_CONSTEVAL_PASSES_H_ +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/iree/compiler/Dialect/Flow/Transforms/PassDetail.h b/iree/compiler/Dialect/Flow/Transforms/PassDetail.h index 740ad78..9a8cb80 100644 --- a/iree/compiler/Dialect/Flow/Transforms/PassDetail.h +++ b/iree/compiler/Dialect/Flow/Transforms/PassDetail.h
@@ -7,6 +7,7 @@ #ifndef IREE_COMPILER_DIALECT_FLOW_TRANSFORMS_PASS_DETAIL_H_ #define IREE_COMPILER_DIALECT_FLOW_TRANSFORMS_PASS_DETAIL_H_ +#include "mlir/IR/BuiltinOps.h" #include "mlir/IR/FunctionInterfaces.h" #include "mlir/Pass/Pass.h"
diff --git a/iree/compiler/Dialect/HAL/IR/HALBase.td b/iree/compiler/Dialect/HAL/IR/HALBase.td index dc1df3c..ce21e6c 100644 --- a/iree/compiler/Dialect/HAL/IR/HALBase.td +++ b/iree/compiler/Dialect/HAL/IR/HALBase.td
@@ -25,16 +25,16 @@ let cppNamespace = "::mlir::iree_compiler::IREE::HAL"; } -def HAL_MemoryType_None : BitEnumAttrCase<"None", 0x0000>; // ? -def HAL_MemoryType_Transient : BitEnumAttrCase<"Transient", 0x0001>; // T -def HAL_MemoryType_HostVisible : BitEnumAttrCase<"HostVisible", 0x0002>; // h -def HAL_MemoryType_HostCoherent : BitEnumAttrCase<"HostCoherent", 0x0004>; // c -def HAL_MemoryType_HostCached : BitEnumAttrCase<"HostCached", 0x0008>; // C -def HAL_MemoryType_HostLocal : BitEnumAttrCase<"HostLocal", 0x0006>; // H -def HAL_MemoryType_DeviceVisible : BitEnumAttrCase<"DeviceVisible", 0x0010>; // d -def HAL_MemoryType_DeviceLocal : BitEnumAttrCase<"DeviceLocal", 0x0030>; // D +def HAL_MemoryType_None : I32BitEnumAttrCase<"None", 0x0000>; // ? +def HAL_MemoryType_Transient : I32BitEnumAttrCase<"Transient", 0x0001>; // T +def HAL_MemoryType_HostVisible : I32BitEnumAttrCase<"HostVisible", 0x0002>; // h +def HAL_MemoryType_HostCoherent : I32BitEnumAttrCase<"HostCoherent", 0x0004>; // c +def HAL_MemoryType_HostCached : I32BitEnumAttrCase<"HostCached", 0x0008>; // C +def HAL_MemoryType_HostLocal : I32BitEnumAttrCase<"HostLocal", 0x0006>; // H +def HAL_MemoryType_DeviceVisible : I32BitEnumAttrCase<"DeviceVisible", 0x0010>; // d +def HAL_MemoryType_DeviceLocal : I32BitEnumAttrCase<"DeviceLocal", 0x0030>; // D def HAL_MemoryTypeBitfieldAttr : - BitEnumAttr<"MemoryTypeBitfield", "valid MemoryType", [ + I32BitEnumAttr<"MemoryTypeBitfield", "valid MemoryType", [ HAL_MemoryType_None, HAL_MemoryType_Transient, HAL_MemoryType_HostVisible, @@ -47,13 +47,13 @@ let cppNamespace = "mlir::iree_compiler::IREE::HAL"; } -def HAL_BufferUsage_None : BitEnumAttrCase<"None", 0x0000>; // ? -def HAL_BufferUsage_Constant : BitEnumAttrCase<"Constant", 0x0001>; // C -def HAL_BufferUsage_Transfer : BitEnumAttrCase<"Transfer", 0x0002>; // T -def HAL_BufferUsage_Mapping : BitEnumAttrCase<"Mapping", 0x0004>; // M -def HAL_BufferUsage_Dispatch : BitEnumAttrCase<"Dispatch", 0x0008>; // D +def HAL_BufferUsage_None : I32BitEnumAttrCase<"None", 0x0000>; // ? +def HAL_BufferUsage_Constant : I32BitEnumAttrCase<"Constant", 0x0001>; // C +def HAL_BufferUsage_Transfer : I32BitEnumAttrCase<"Transfer", 0x0002>; // T +def HAL_BufferUsage_Mapping : I32BitEnumAttrCase<"Mapping", 0x0004>; // M +def HAL_BufferUsage_Dispatch : I32BitEnumAttrCase<"Dispatch", 0x0008>; // D def HAL_BufferUsageBitfieldAttr : - BitEnumAttr<"BufferUsageBitfield", "valid BufferUsage", [ + I32BitEnumAttr<"BufferUsageBitfield", "valid BufferUsage", [ HAL_BufferUsage_None, HAL_BufferUsage_Constant, HAL_BufferUsage_Transfer, @@ -63,11 +63,11 @@ let cppNamespace = "mlir::iree_compiler::IREE::HAL"; } -def HAL_CommandBufferMode_None : BitEnumAttrCase<"None", 0x0000>; -def HAL_CommandBufferMode_OneShot : BitEnumAttrCase<"OneShot", 0x0001>; -def HAL_CommandBufferMode_AllowInlineExecution : BitEnumAttrCase<"AllowInlineExecution", 0x0010>; +def HAL_CommandBufferMode_None : I32BitEnumAttrCase<"None", 0x0000>; +def HAL_CommandBufferMode_OneShot : I32BitEnumAttrCase<"OneShot", 0x0001>; +def HAL_CommandBufferMode_AllowInlineExecution : I32BitEnumAttrCase<"AllowInlineExecution", 0x0010>; def HAL_CommandBufferModeBitfieldAttr : - BitEnumAttr<"CommandBufferModeBitfield", "valid CommandBufferMode", [ + I32BitEnumAttr<"CommandBufferModeBitfield", "valid CommandBufferMode", [ HAL_CommandBufferMode_None, HAL_CommandBufferMode_OneShot, HAL_CommandBufferMode_AllowInlineExecution, @@ -75,11 +75,11 @@ let cppNamespace = "mlir::iree_compiler::IREE::HAL"; } -def HAL_CommandCategory_None : BitEnumAttrCase<"None", 0x0000>; -def HAL_CommandCategory_Transfer : BitEnumAttrCase<"Transfer", 0x0001>; -def HAL_CommandCategory_Dispatch : BitEnumAttrCase<"Dispatch", 0x0002>; +def HAL_CommandCategory_None : I32BitEnumAttrCase<"None", 0x0000>; +def HAL_CommandCategory_Transfer : I32BitEnumAttrCase<"Transfer", 0x0001>; +def HAL_CommandCategory_Dispatch : I32BitEnumAttrCase<"Dispatch", 0x0002>; def HAL_CommandCategoryBitfieldAttr : - BitEnumAttr<"CommandCategoryBitfield", "valid CommandCategory", [ + I32BitEnumAttr<"CommandCategoryBitfield", "valid CommandCategory", [ HAL_CommandCategory_None, HAL_CommandCategory_Transfer, HAL_CommandCategory_Dispatch, @@ -111,15 +111,15 @@ let cppNamespace = "::mlir::iree_compiler::IREE::HAL"; } -def HAL_ExecutionStage_None : BitEnumAttrCase<"None", 0x0000>; -def HAL_ExecutionStage_CommandIssue : BitEnumAttrCase<"CommandIssue", 0x0001>; -def HAL_ExecutionStage_CommandProcess : BitEnumAttrCase<"CommandProcess", 0x0002>; -def HAL_ExecutionStage_Dispatch : BitEnumAttrCase<"Dispatch", 0x0004>; -def HAL_ExecutionStage_Transfer : BitEnumAttrCase<"Transfer", 0x0008>; -def HAL_ExecutionStage_CommandRetire : BitEnumAttrCase<"CommandRetire", 0x0010>; -def HAL_ExecutionStage_Host : BitEnumAttrCase<"Host", 0x0020>; +def HAL_ExecutionStage_None : I32BitEnumAttrCase<"None", 0x0000>; +def HAL_ExecutionStage_CommandIssue : I32BitEnumAttrCase<"CommandIssue", 0x0001>; +def HAL_ExecutionStage_CommandProcess : I32BitEnumAttrCase<"CommandProcess", 0x0002>; +def HAL_ExecutionStage_Dispatch : I32BitEnumAttrCase<"Dispatch", 0x0004>; +def HAL_ExecutionStage_Transfer : I32BitEnumAttrCase<"Transfer", 0x0008>; +def HAL_ExecutionStage_CommandRetire : I32BitEnumAttrCase<"CommandRetire", 0x0010>; +def HAL_ExecutionStage_Host : I32BitEnumAttrCase<"Host", 0x0020>; def HAL_ExecutionStageBitfieldAttr : - BitEnumAttr<"ExecutionStageBitfield", "valid ExecutionStage", [ + I32BitEnumAttr<"ExecutionStageBitfield", "valid ExecutionStage", [ HAL_ExecutionStage_None, HAL_ExecutionStage_CommandIssue, HAL_ExecutionStage_CommandProcess, @@ -131,29 +131,29 @@ let cppNamespace = "mlir::iree_compiler::IREE::HAL"; } -def HAL_ExecutionBarrierFlag_None : BitEnumAttrCase<"None", 0x0000>; -def HAL_ExecutionBarrierFlag_Reserved : BitEnumAttrCase<"Reserved", 0x0001>; +def HAL_ExecutionBarrierFlag_None : I32BitEnumAttrCase<"None", 0x0000>; +def HAL_ExecutionBarrierFlag_Reserved : I32BitEnumAttrCase<"Reserved", 0x0001>; def HAL_ExecutionBarrierFlagBitfieldAttr : - BitEnumAttr<"ExecutionBarrierFlagBitfield", "valid ExecutionBarrierFlag", [ + I32BitEnumAttr<"ExecutionBarrierFlagBitfield", "valid ExecutionBarrierFlag", [ HAL_ExecutionBarrierFlag_None, HAL_ExecutionBarrierFlag_Reserved, ]> { let cppNamespace = "mlir::iree_compiler::IREE::HAL"; } -def HAL_AccessScope_None : BitEnumAttrCase<"None", 0x0000>; -def HAL_AccessScope_IndirectCommandRead : BitEnumAttrCase<"IndirectCommandRead", 0x0001>; -def HAL_AccessScope_ConstantRead : BitEnumAttrCase<"ConstantRead", 0x0002>; -def HAL_AccessScope_DispatchRead : BitEnumAttrCase<"DispatchRead", 0x0004>; -def HAL_AccessScope_DispatchWrite : BitEnumAttrCase<"DispatchWrite", 0x0008>; -def HAL_AccessScope_TransferRead : BitEnumAttrCase<"TransferRead", 0x0010>; -def HAL_AccessScope_TransferWrite : BitEnumAttrCase<"TransferWrite", 0x0020>; -def HAL_AccessScope_HostRead : BitEnumAttrCase<"HostRead", 0x0040>; -def HAL_AccessScope_HostWrite : BitEnumAttrCase<"HostWrite", 0x0080>; -def HAL_AccessScope_MemoryRead : BitEnumAttrCase<"MemoryRead", 0x0100>; -def HAL_AccessScope_MemoryWrite : BitEnumAttrCase<"MemoryWrite", 0x0200>; +def HAL_AccessScope_None : I32BitEnumAttrCase<"None", 0x0000>; +def HAL_AccessScope_IndirectCommandRead : I32BitEnumAttrCase<"IndirectCommandRead", 0x0001>; +def HAL_AccessScope_ConstantRead : I32BitEnumAttrCase<"ConstantRead", 0x0002>; +def HAL_AccessScope_DispatchRead : I32BitEnumAttrCase<"DispatchRead", 0x0004>; +def HAL_AccessScope_DispatchWrite : I32BitEnumAttrCase<"DispatchWrite", 0x0008>; +def HAL_AccessScope_TransferRead : I32BitEnumAttrCase<"TransferRead", 0x0010>; +def HAL_AccessScope_TransferWrite : I32BitEnumAttrCase<"TransferWrite", 0x0020>; +def HAL_AccessScope_HostRead : I32BitEnumAttrCase<"HostRead", 0x0040>; +def HAL_AccessScope_HostWrite : I32BitEnumAttrCase<"HostWrite", 0x0080>; +def HAL_AccessScope_MemoryRead : I32BitEnumAttrCase<"MemoryRead", 0x0100>; +def HAL_AccessScope_MemoryWrite : I32BitEnumAttrCase<"MemoryWrite", 0x0200>; def HAL_AccessScopeBitfieldAttr : - BitEnumAttr<"AccessScopeBitfield", "valid AccessScope", [ + I32BitEnumAttr<"AccessScopeBitfield", "valid AccessScope", [ HAL_AccessScope_None, HAL_AccessScope_IndirectCommandRead, HAL_AccessScope_ConstantRead,
diff --git a/iree/compiler/Dialect/Stream/IR/StreamBase.td b/iree/compiler/Dialect/Stream/IR/StreamBase.td index 80174c3..ca975ce 100644 --- a/iree/compiler/Dialect/Stream/IR/StreamBase.td +++ b/iree/compiler/Dialect/Stream/IR/StreamBase.td
@@ -275,11 +275,11 @@ let hasCustomAssemblyFormat = 1; } -def Stream_ResourceAccess_None : BitEnumAttrCase<"None", 0x0000>; -def Stream_ResourceAccess_Read : BitEnumAttrCase<"Read", 0x0001>; -def Stream_ResourceAccess_Write : BitEnumAttrCase<"Write", 0x0002>; +def Stream_ResourceAccess_None : I32BitEnumAttrCase<"None", 0x0000>; +def Stream_ResourceAccess_Read : I32BitEnumAttrCase<"Read", 0x0001>; +def Stream_ResourceAccess_Write : I32BitEnumAttrCase<"Write", 0x0002>; def Stream_ResourceAccessBitfieldAttr : - BitEnumAttr<"ResourceAccessBitfield", "valid ResourceAccess", [ + I32BitEnumAttr<"ResourceAccessBitfield", "valid ResourceAccess", [ Stream_ResourceAccess_None, Stream_ResourceAccess_Read, Stream_ResourceAccess_Write,
diff --git a/iree/compiler/Dialect/Util/Analysis/Explorer.cpp b/iree/compiler/Dialect/Util/Analysis/Explorer.cpp index 179d63a..dc44ab5 100644 --- a/iree/compiler/Dialect/Util/Analysis/Explorer.cpp +++ b/iree/compiler/Dialect/Util/Analysis/Explorer.cpp
@@ -32,11 +32,10 @@ unsigned operandIdx) { // I don't know if there's a better way to do this - the interface doesn't // help. - auto successorOperands = branchOp.getSuccessorOperands(successorIdx); - if (!successorOperands.hasValue()) return llvm::None; - auto &operandRange = successorOperands.getValue(); + auto operandRange = branchOp.getSuccessorOperands(successorIdx); if (operandRange.empty()) return llvm::None; - unsigned beginIdx = operandRange.getBeginOperandIndex(); + unsigned beginIdx = + operandRange.getForwardedOperands().getBeginOperandIndex(); if (operandIdx >= beginIdx && operandIdx < beginIdx + operandRange.size()) { // Covered. return {operandIdx - beginIdx}; @@ -496,9 +495,9 @@ // successors and one or more may end up in our target block. for (unsigned i = 0; i < sourceBlock->getNumSuccessors(); ++i) { if (sourceBlock->getSuccessor(i) == targetBlock) { - auto operandRange = branchOp.getSuccessorOperands(i); - if (!operandRange.hasValue()) continue; - if (fn(sourceBlock, operandRange.getValue()).wasInterrupted()) { + auto operandRange = + branchOp.getSuccessorOperands(i).getForwardedOperands(); + if (fn(sourceBlock, operandRange).wasInterrupted()) { return result; } }
diff --git a/iree/compiler/Dialect/Util/Transforms/FixedPointIterator.cpp b/iree/compiler/Dialect/Util/Transforms/FixedPointIterator.cpp index 575589e..e79b5ba 100644 --- a/iree/compiler/Dialect/Util/Transforms/FixedPointIterator.cpp +++ b/iree/compiler/Dialect/Util/Transforms/FixedPointIterator.cpp
@@ -4,6 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +#include "mlir/IR/BuiltinTypes.h" #include "mlir/Pass/Pass.h" #include "mlir/Pass/PassManager.h"
diff --git a/iree/compiler/Dialect/Util/Transforms/Patterns.cpp b/iree/compiler/Dialect/Util/Transforms/Patterns.cpp index b7d09ef..9b817c2 100644 --- a/iree/compiler/Dialect/Util/Transforms/Patterns.cpp +++ b/iree/compiler/Dialect/Util/Transforms/Patterns.cpp
@@ -68,9 +68,7 @@ for (unsigned successorIndex = 0; successorIndex < branchOp->getNumSuccessors(); ++successorIndex) { auto *block = branchOp->getSuccessor(successorIndex); - auto operandsOr = branchOp.getSuccessorOperands(successorIndex); - if (!operandsOr.hasValue()) continue; - auto operands = operandsOr.getValue(); + auto operands = branchOp.getSuccessorOperands(successorIndex); BlockSource blockSource; blockSource.branchOp = branchOp; blockSource.successorIndex = successorIndex; @@ -140,10 +138,11 @@ // Erase all the block arguments we've deduplicated. for (auto &blockSource : blockSources) { + auto successorOperands = blockSource.branchOp.getSuccessorOperands( + blockSource.successorIndex); auto operands = - blockSource.branchOp - .getMutableSuccessorOperands(blockSource.successorIndex) - .getValue(); + successorOperands.slice(successorOperands.getProducedOperandCount(), + successorOperands.size()); rewriter.updateRootInPlace(blockSource.branchOp, [&]() { eraseOperands(operands, elidedArgs); }); @@ -195,8 +194,7 @@ for (unsigned successorIndex = 0; successorIndex < branchOp->getNumSuccessors(); ++successorIndex) { auto *block = branchOp->getSuccessor(successorIndex); - auto operandsOr = branchOp.getSuccessorOperands(successorIndex); - if (!operandsOr.hasValue()) continue; + auto operands = branchOp.getSuccessorOperands(successorIndex); BlockSource blockSource; blockSource.branchOp = branchOp; blockSource.successorIndex = successorIndex; @@ -226,9 +224,8 @@ // Find the uniform value passed for the operand of all branches. Value uniformValue = nullptr; for (auto &blockSource : blockSources) { - auto operands = blockSource.branchOp - .getSuccessorOperands(blockSource.successorIndex) - .getValue(); + auto operands = blockSource.branchOp.getSuccessorOperands( + blockSource.successorIndex); auto operand = operands[argIndex]; if (!uniformValue) { // First usage. @@ -269,10 +266,11 @@ // Erase all the block arguments we remapped. for (auto &blockSource : blockSources) { + auto successorOperands = blockSource.branchOp.getSuccessorOperands( + blockSource.successorIndex); auto operands = - blockSource.branchOp - .getMutableSuccessorOperands(blockSource.successorIndex) - .getValue(); + successorOperands.slice(successorOperands.getProducedOperandCount(), + successorOperands.size()); rewriter.updateRootInPlace(blockSource.branchOp, [&]() { eraseOperands(operands, elidedArgs); });
diff --git a/iree/compiler/Dialect/VM/Analysis/RegisterAllocation.cpp b/iree/compiler/Dialect/VM/Analysis/RegisterAllocation.cpp index bcd0370..86f79ca 100644 --- a/iree/compiler/Dialect/VM/Analysis/RegisterAllocation.cpp +++ b/iree/compiler/Dialect/VM/Analysis/RegisterAllocation.cpp
@@ -505,9 +505,10 @@ // possible to evaluate as a direct remapping. SmallVector<std::pair<Register, Register>, 8> srcDstRegs; auto *targetBlock = op->getSuccessor(successorIndex); - auto operands = - cast<BranchOpInterface>(op).getSuccessorOperands(successorIndex); - for (auto it : llvm::enumerate(*operands)) { + auto operands = cast<BranchOpInterface>(op) + .getSuccessorOperands(successorIndex) + .getForwardedOperands(); + for (auto it : llvm::enumerate(operands)) { auto srcReg = mapToRegister(it.value()); BlockArgument targetArg = targetBlock->getArgument(it.index()); auto dstReg = mapToRegister(targetArg);
diff --git a/iree/compiler/Dialect/VM/IR/VMOps.cpp b/iree/compiler/Dialect/VM/IR/VMOps.cpp index ddfb09a..17e8745 100644 --- a/iree/compiler/Dialect/VM/IR/VMOps.cpp +++ b/iree/compiler/Dialect/VM/IR/VMOps.cpp
@@ -1023,10 +1023,9 @@ getOperation()->eraseOperand(index); } -Optional<MutableOperandRange> BranchOp::getMutableSuccessorOperands( - unsigned index) { +SuccessorOperands BranchOp::getSuccessorOperands(unsigned index) { assert(index == 0 && "invalid successor index"); - return destOperandsMutable(); + return SuccessorOperands(destOperandsMutable()); } void CallOp::getEffects( @@ -1257,11 +1256,10 @@ } } -Optional<MutableOperandRange> CondBranchOp::getMutableSuccessorOperands( - unsigned index) { +SuccessorOperands CondBranchOp::getSuccessorOperands(unsigned index) { assert(index < getNumSuccessors() && "invalid successor index"); - return index == trueIndex ? trueDestOperandsMutable() - : falseDestOperandsMutable(); + return index == trueIndex ? SuccessorOperands(trueDestOperandsMutable()) + : SuccessorOperands(falseDestOperandsMutable()); } LogicalResult verifyFailOp(Operation *op, Value statusVal) { @@ -1333,10 +1331,9 @@ getOperation()->eraseOperand(index); } -Optional<MutableOperandRange> YieldOp::getMutableSuccessorOperands( - unsigned index) { +SuccessorOperands YieldOp::getSuccessorOperands(unsigned index) { assert(index == 0 && "invalid successor index"); - return destOperandsMutable(); + return SuccessorOperands(destOperandsMutable()); } //===----------------------------------------------------------------------===// @@ -1353,10 +1350,9 @@ getOperation()->eraseOperand(index); } -Optional<MutableOperandRange> BreakOp::getMutableSuccessorOperands( - unsigned index) { +SuccessorOperands BreakOp::getSuccessorOperands(unsigned index) { assert(index == 0 && "invalid successor index"); - return destOperandsMutable(); + return SuccessorOperands(destOperandsMutable()); } Block *CondBreakOp::getDest() { return getOperation()->getSuccessor(0); } @@ -1369,10 +1365,9 @@ getOperation()->eraseOperand(index); } -Optional<MutableOperandRange> CondBreakOp::getMutableSuccessorOperands( - unsigned index) { +SuccessorOperands CondBreakOp::getSuccessorOperands(unsigned index) { assert(index == 0 && "invalid successor index"); - return destOperandsMutable(); + return SuccessorOperands(destOperandsMutable()); } } // namespace VM
diff --git a/iree/compiler/Dialect/Vulkan/IR/VulkanBase.td b/iree/compiler/Dialect/Vulkan/IR/VulkanBase.td index 679b0b2..689cb08 100644 --- a/iree/compiler/Dialect/Vulkan/IR/VulkanBase.td +++ b/iree/compiler/Dialect/Vulkan/IR/VulkanBase.td
@@ -49,10 +49,10 @@ CPred<"::mlir::iree_compiler::IREE::Vulkan::symbolize" # name # "(" "$_self.cast<StringAttr>().getValue()).hasValue()">; -// Wrapper over base BitEnumAttr to set common fields. +// Wrapper over base I32BitEnumAttr to set common fields. class VK_BitEnumAttr<string name, string description, - list<BitEnumAttrCase> cases> : - BitEnumAttr<name, description, cases> { + list<I32BitEnumAttrCase> cases> : + I32BitEnumAttr<name, description, cases> { let predicate = And<[I32Attr.predicate, VK_IsKnownBitEnumCaseFor<name>]>; let cppNamespace = "::mlir::iree_compiler::IREE::Vulkan"; } @@ -159,15 +159,15 @@ // Subgroup features //===----------------------------------------------------------------------===// -def VK_SF_Basic : BitEnumAttrCase<"Basic", 0x001>; -def VK_SF_Vote : BitEnumAttrCase<"Vote", 0x002>; -def VK_SF_Arithmetic : BitEnumAttrCase<"Arithmetic", 0x004>; -def VK_SF_Ballot : BitEnumAttrCase<"Ballot", 0x008>; -def VK_SF_Shuffle : BitEnumAttrCase<"Shuffle", 0x010>; -def VK_SF_ShuffleRelative : BitEnumAttrCase<"ShuffleRelative", 0x020>; -def VK_SF_Clustered : BitEnumAttrCase<"Clustered", 0x040>; -def VK_SF_Quad : BitEnumAttrCase<"Quad", 0x080>; -def VK_SF_PartitionedNV : BitEnumAttrCase<"PartitionedNV", 0x100>; +def VK_SF_Basic : I32BitEnumAttrCase<"Basic", 0x001>; +def VK_SF_Vote : I32BitEnumAttrCase<"Vote", 0x002>; +def VK_SF_Arithmetic : I32BitEnumAttrCase<"Arithmetic", 0x004>; +def VK_SF_Ballot : I32BitEnumAttrCase<"Ballot", 0x008>; +def VK_SF_Shuffle : I32BitEnumAttrCase<"Shuffle", 0x010>; +def VK_SF_ShuffleRelative : I32BitEnumAttrCase<"ShuffleRelative", 0x020>; +def VK_SF_Clustered : I32BitEnumAttrCase<"Clustered", 0x040>; +def VK_SF_Quad : I32BitEnumAttrCase<"Quad", 0x080>; +def VK_SF_PartitionedNV : I32BitEnumAttrCase<"PartitionedNV", 0x100>; def VK_SubgroupFeatureAttr : VK_BitEnumAttr< "SubgroupFeature", "supported Vulkan subgroup feature", [
diff --git a/iree/compiler/InputConversion/Common/PassDetail.h b/iree/compiler/InputConversion/Common/PassDetail.h index 67316a7..5dfb26f 100644 --- a/iree/compiler/InputConversion/Common/PassDetail.h +++ b/iree/compiler/InputConversion/Common/PassDetail.h
@@ -8,6 +8,7 @@ #define IREE_COMPILER_INPUTCONVERSION_COMMON_PASSDETAIL_H_ #include "mlir/Dialect/Func/IR/FuncOps.h" +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/iree/compiler/InputConversion/MHLO/PassDetail.h b/iree/compiler/InputConversion/MHLO/PassDetail.h index 097b977..a1320a8 100644 --- a/iree/compiler/InputConversion/MHLO/PassDetail.h +++ b/iree/compiler/InputConversion/MHLO/PassDetail.h
@@ -8,6 +8,7 @@ #define IREE_COMPILER_INPUTCONVERSION_MHLO_PASSDETAIL_H_ #include "mlir/Dialect/Func/IR/FuncOps.h" +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/iree/compiler/InputConversion/MHLO/Passes.h b/iree/compiler/InputConversion/MHLO/Passes.h index ea7baa8..5f625d8 100644 --- a/iree/compiler/InputConversion/MHLO/Passes.h +++ b/iree/compiler/InputConversion/MHLO/Passes.h
@@ -8,6 +8,7 @@ #define IREE_COMPILER_INPUTCONVERSION_MHLO_PASSES_H_ #include "mlir/Dialect/Func/IR/FuncOps.h" +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/iree/compiler/InputConversion/TOSA/PassDetail.h b/iree/compiler/InputConversion/TOSA/PassDetail.h index 97cc856..6b1268b 100644 --- a/iree/compiler/InputConversion/TOSA/PassDetail.h +++ b/iree/compiler/InputConversion/TOSA/PassDetail.h
@@ -7,6 +7,7 @@ #ifndef IREE_COMPILER_INPUTCONVERSION_TOSA_PASSDETAIL_H_ #define IREE_COMPILER_INPUTCONVERSION_TOSA_PASSDETAIL_H_ +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/iree/compiler/InputConversion/TOSA/Passes.h b/iree/compiler/InputConversion/TOSA/Passes.h index fb2f097..827dca4 100644 --- a/iree/compiler/InputConversion/TOSA/Passes.h +++ b/iree/compiler/InputConversion/TOSA/Passes.h
@@ -7,6 +7,7 @@ #ifndef IREE_COMPILER_INPUTCONVERSION_TOSA_PASSES_H_ #define IREE_COMPILER_INPUTCONVERSION_TOSA_PASSES_H_ +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/iree/compiler/Translation/test/hal_executable.mlir b/iree/compiler/Translation/test/hal_executable.mlir index c7543fd..af2d78f 100644 --- a/iree/compiler/Translation/test/hal_executable.mlir +++ b/iree/compiler/Translation/test/hal_executable.mlir
@@ -1,4 +1,4 @@ -// RUN: iree-translate -split-input-file -print-ir-after=iree-hal-serialize-executables -iree-mlir-to-hal-executable -iree-hal-target-backends=vmvx %s -o=/dev/null 2>&1 | FileCheck %s +// RUN: iree-translate -split-input-file -mlir-print-ir-after=iree-hal-serialize-executables -iree-mlir-to-hal-executable -iree-hal-target-backends=vmvx %s -o=/dev/null 2>&1 | FileCheck %s // Each entry point has a layout specification indicating the total number of // push constants available and the descriptor sets and their bindings.
diff --git a/iree/compiler/Translation/test/streams.mlir b/iree/compiler/Translation/test/streams.mlir index 86126d2..b75eb35 100644 --- a/iree/compiler/Translation/test/streams.mlir +++ b/iree/compiler/Translation/test/streams.mlir
@@ -1,4 +1,4 @@ -// RUN: iree-compile -split-input-file -iree-hal-target-backends=vmvx -iree-mlir-to-vm-bytecode-module -iree-vm-bytecode-module-output-format=flatbuffer-text %s -print-ir-after=iree-vm-ordinal-allocation 2>&1 | FileCheck %s +// RUN: iree-compile -split-input-file -iree-hal-target-backends=vmvx -iree-mlir-to-vm-bytecode-module -iree-vm-bytecode-module-output-format=flatbuffer-text %s -mlir-print-ir-after=iree-vm-ordinal-allocation 2>&1 | FileCheck %s // This file has a few test programs that show how to mix `flow` dispatches into // those created by the `linalg` dispatch region formation: the idea is to use
diff --git a/iree/samples/custom_modules/dialect/custom_dialect.cc b/iree/samples/custom_modules/dialect/custom_dialect.cc index f658592..6e2a41c 100644 --- a/iree/samples/custom_modules/dialect/custom_dialect.cc +++ b/iree/samples/custom_modules/dialect/custom_dialect.cc
@@ -45,7 +45,7 @@ using VMConversionDialectInterface::VMConversionDialectInterface; OwningOpRef<mlir::ModuleOp> parseVMImportModule() const override { - return mlir::parseSourceString( + return mlir::parseSourceString<mlir::ModuleOp>( StringRef(iree_custom_imports_create()->data, iree_custom_imports_create()->size), getDialect()->getContext());
diff --git a/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/core.py b/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/core.py index 5a5e0c6..67e3527 100644 --- a/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/core.py +++ b/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/core.py
@@ -215,7 +215,7 @@ crash_reproducer_path = tfs.alloc_optional( "core-reproducer.mlir", export_as=options.crash_reproducer_path) if crash_reproducer_path: - cl.append(f"--pass-pipeline-crash-reproducer={crash_reproducer_path}") + cl.append(f"--mlir-pass-pipeline-crash-reproducer={crash_reproducer_path}") if options.enable_tflite_bindings: cl.append("--iree-tflite-bindings-support") if options.enable_benchmark:
diff --git a/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/tf.py b/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/tf.py index a973295..73c7464 100644 --- a/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/tf.py +++ b/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/tf.py
@@ -182,7 +182,7 @@ crash_reproducer_path = tfs.alloc_optional( "tf-reproducer.mlir", export_as=requested_crash_reproducer_path) if crash_reproducer_path: - cl.append(f"--pass-pipeline-crash-reproducer={crash_reproducer_path}") + cl.append(f"--mlir-pass-pipeline-crash-reproducer={crash_reproducer_path}") # Extra args. cl.extend(options.import_extra_args)
diff --git a/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/tflite.py b/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/tflite.py index 04d1e08..af7c019 100644 --- a/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/tflite.py +++ b/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/tflite.py
@@ -132,7 +132,7 @@ crash_reproducer_path = tfs.alloc_optional( "tflite-reproducer.mlir", export_as=requested_crash_reproducer_path) if crash_reproducer_path: - cl.append(f"--pass-pipeline-crash-reproducer={crash_reproducer_path}") + cl.append(f"--mlir-pass-pipeline-crash-reproducer={crash_reproducer_path}") # Extra args. cl.extend(options.import_extra_args)
diff --git a/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/xla.py b/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/xla.py index 87d32f5..2493c2d 100644 --- a/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/xla.py +++ b/llvm-external-projects/iree-compiler-api/python/iree/compiler/tools/xla.py
@@ -140,7 +140,7 @@ crash_reproducer_path = tfs.alloc_optional( "xla-reproducer.mlir", export_as=requested_crash_reproducer_path) if crash_reproducer_path: - cl.append(f"--pass-pipeline-crash-reproducer={crash_reproducer_path}") + cl.append(f"--mlir-pass-pipeline-crash-reproducer={crash_reproducer_path}") # Extra args. cl.extend(options.import_extra_args)
diff --git a/llvm-external-projects/iree-dialects/lib/Dialect/LinalgExt/Transforms/LinalgExtBufferization.cpp b/llvm-external-projects/iree-dialects/lib/Dialect/LinalgExt/Transforms/LinalgExtBufferization.cpp index ceb5de9..ebcfe24 100644 --- a/llvm-external-projects/iree-dialects/lib/Dialect/LinalgExt/Transforms/LinalgExtBufferization.cpp +++ b/llvm-external-projects/iree-dialects/lib/Dialect/LinalgExt/Transforms/LinalgExtBufferization.cpp
@@ -90,7 +90,7 @@ // should not be inside terminator (which would be the default insertion // point). Value buffer = *state.getBuffer(b, *insertDestOperands.front(), - /*forceInPlace=*/false, + /*forceInPlace=*/llvm::None, /*customCopyInsertionPoint=*/op); newResults.push_back(buffer); }
diff --git a/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Transforms/PassDetail.h b/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Transforms/PassDetail.h index 5b23dc4..5a06b47 100644 --- a/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Transforms/PassDetail.h +++ b/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Transforms/PassDetail.h
@@ -7,6 +7,7 @@ #ifndef IREE_DIALECTS_DIALECT_IREEPYDM_TRANSFORMS_PASSDETAIL_H #define IREE_DIALECTS_DIALECT_IREEPYDM_TRANSFORMS_PASSDETAIL_H +#include "mlir/IR/BuiltinOps.h" #include "mlir/Pass/Pass.h" namespace mlir {
diff --git a/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Transforms/RTL/LinkRTLPass.cpp b/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Transforms/RTL/LinkRTLPass.cpp index c03d577..cd5a93b 100644 --- a/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Transforms/RTL/LinkRTLPass.cpp +++ b/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Transforms/RTL/LinkRTLPass.cpp
@@ -51,7 +51,8 @@ if (localSource.asmBlob) { // Parse from inline asm. - auto owningOp = parseSourceString(*localSource.asmBlob, context); + auto owningOp = + parseSourceString<ModuleOp>(*localSource.asmBlob, context); if (!owningOp) return failure(); rtlModule = std::make_shared<mlir::OwningOpRef<mlir::ModuleOp>>(
diff --git a/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Utils/TypeInference.cpp b/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Utils/TypeInference.cpp index 2acd110..593c930 100644 --- a/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Utils/TypeInference.cpp +++ b/llvm-external-projects/iree-dialects/lib/Dialect/PyDM/Utils/TypeInference.cpp
@@ -6,6 +6,7 @@ #include "iree-dialects/Dialect/PyDM/Utils/TypeInference.h" +#include "mlir/IR/BuiltinOps.h" #include "mlir/IR/Operation.h" #include "mlir/IR/TypeRange.h" @@ -101,9 +102,9 @@ break; successorIndex += 1; } - auto successorOperands = branchOp.getSuccessorOperands(successorIndex); - assert(successorOperands && "expected branch with explicit operands"); - TypeRange operandTypes(*successorOperands); + auto successorOperands = + branchOp.getSuccessorOperands(successorIndex).getForwardedOperands(); + TypeRange operandTypes(successorOperands); if (block->getArgumentTypes() != operandTypes) { results.push_back(BlockPredecessor{ branchOp, successorIndex,
diff --git a/third_party/llvm-project b/third_party/llvm-project index e288bbb..95f0f69 160000 --- a/third_party/llvm-project +++ b/third_party/llvm-project
@@ -1 +1 @@ -Subproject commit e288bbb1fffeee4f47efc97186a75f6bc6c30570 +Subproject commit 95f0f69f1ff8eff34a00a47a236c2f91a2392c70
diff --git a/third_party/mlir-hlo b/third_party/mlir-hlo index 8a04560..a41d2b9 160000 --- a/third_party/mlir-hlo +++ b/third_party/mlir-hlo
@@ -1 +1 @@ -Subproject commit 8a045602c94dffa19c8367d8feb7c40d8f885b1f +Subproject commit a41d2b935f15dc98b0e0ec356dd57a96f32cf147