Add riscv64 baremetal runtime (#14105)

This patch add a build rule for riscv64 baremetal runtime.

The riscv64 baremetal toolchain can get from
https://github.com/riscv-collab/riscv-gnu-toolchain.
riscv64 baremetal toolchain build command:
```
git clone https://github.com/riscv-collab/riscv-gnu-toolchain.git
cd riscv-gnu-toolchain
mkdir -p build/install && cd build
../configure --enable-llvm --prefix=`realpath install`
make -j8
```

Build command
```
cmake -G Ninja \
    -B ../iree-baremetal-rv64 \
    -DCMAKE_TOOLCHAIN_FILE="./build_tools/cmake/riscv.toolchain.cmake" \
    -DRISCV_TOOLCHAIN_ROOT=<riscv64 baremetal toolchain root> \
    -DRISCV_CPU="generic-riscv_64" \
    -DRISCV_TOOLCHAIN_PREFIX="riscv64-unknown-elf-" \
    -DIREE_HOST_BIN_DIR=<host tool bin path> \
    -DRISCV_COMPILER_FLAGS="-O2" \
    -DIREE_BUILD_COMPILER=OFF \
    -DIREE_ENABLE_CPUINFO=OFF \
    -DIREE_BUILD_TESTS=OFF \
    -DIREE_ENABLE_ASSERTIONS=ON \
    -DIREE_BUILD_SAMPLES=ON \
    .
    
cmake --build ../iree-baremetal-rv64
```

Test Command
```
qemu-riscv64 -cpu rv64 -B 0x100000  ../iree-baremetal-rv64-gnu/samples/simple_embedding/simple_embedding_embedded_sync
```

build_tools/cmake/build_riscv.sh

diff --git a/build_tools/cmake/build_riscv.sh b/build_tools/cmake/build_riscv.sh
index d3f4978..70fd756 100755
--- a/build_tools/cmake/build_riscv.sh
+++ b/build_tools/cmake/build_riscv.sh
@@ -54,12 +54,14 @@
 if [[ "${RISCV_PLATFORM}" == "linux" ]]; then
   args+=(
     -DRISCV_TOOLCHAIN_ROOT="${RISCV_RV64_LINUX_TOOLCHAIN_ROOT}"
+    -DRISCV_TOOLCHAIN_PREFIX="riscv64-unknown-linux-gnu-"
   )
 elif [[ "${RISCV_PLATFORM_ARCH}" == "generic-riscv_32" ]]; then
   args+=(
     # TODO(#6353): Off until tools/ are refactored to support threadless config.
     -DIREE_BUILD_TESTS=OFF
     -DRISCV_TOOLCHAIN_ROOT="${RISCV_RV32_NEWLIB_TOOLCHAIN_ROOT}"
+    -DRISCV_TOOLCHAIN_PREFIX="riscv32-unknown-elf-"
   )
 else
   echo "riscv config for ${RISCV_PLATFORM_ARCH} not supported yet"

build_tools/cmake/riscv.toolchain.cmake

diff --git a/build_tools/cmake/riscv.toolchain.cmake b/build_tools/cmake/riscv.toolchain.cmake
index 68c01cb..f5dc3cd 100644
--- a/build_tools/cmake/riscv.toolchain.cmake
+++ b/build_tools/cmake/riscv.toolchain.cmake
@@ -23,6 +23,7 @@
 set(RISCV_TOOL_PATH "$ENV{HOME}/riscv" CACHE PATH "RISC-V tool path")
 
 set(RISCV_TOOLCHAIN_ROOT "${RISCV_TOOL_PATH}/toolchain/clang/${RISCV_HOST_TAG}/RISCV" CACHE PATH "RISC-V compiler path")
+set(RISCV_TOOLCHAIN_PREFIX "riscv64-unknown-linux-gnu-" CACHE STRING "RISC-V toolchain prefix")
 set(CMAKE_FIND_ROOT_PATH ${RISCV_TOOLCHAIN_ROOT})
 list(APPEND CMAKE_PREFIX_PATH "${RISCV_TOOLCHAIN_ROOT}")
 
@@ -39,9 +40,33 @@
 set(RISCV_LINKER_FLAGS)
 set(RISCV_LINKER_FLAGS_EXE)
 
-if(RISCV_CPU STREQUAL "linux-riscv_64")
-  set(CMAKE_SYSTEM_PROCESSOR riscv64)
+if (RISCV_CPU MATCHES "generic")
+  set(CMAKE_SYSTEM_NAME Generic)
+  set(CMAKE_SYSTEM_LIBRARY_PATH "${RISCV_TOOLCHAIN_ROOT}/${RISCV_TOOLCHAIN_PREFIX}/lib/")
+  set(CMAKE_CROSSCOMPILING ON CACHE BOOL "")
+  set(CMAKE_C_STANDARD 11)
+  set(CMAKE_C_EXTENSIONS OFF)     # Force the usage of _ISOC11_SOURCE
+  set(IREE_BUILD_BINDINGS_TFLITE OFF CACHE BOOL "" FORCE)
+  set(IREE_BUILD_BINDINGS_TFLITE_JAVA OFF CACHE BOOL "" FORCE)
+  set(IREE_HAL_DRIVER_DEFAULTS OFF CACHE BOOL "" FORCE)
+  set(IREE_HAL_DRIVER_LOCAL_SYNC ON CACHE BOOL "" FORCE)
+  set(IREE_HAL_EXECUTABLE_LOADER_DEFAULTS OFF CACHE BOOL "" FORCE)
+  set(IREE_HAL_EXECUTABLE_LOADER_EMBEDDED_ELF ON CACHE BOOL "" FORCE)
+  set(IREE_HAL_EXECUTABLE_LOADER_VMVX_MODULE ON CACHE BOOL "" FORCE)
+  set(IREE_HAL_EXECUTABLE_PLUGIN_DEFAULTS OFF CACHE BOOL "" FORCE)
+  set(IREE_HAL_EXECUTABLE_PLUGIN_EMBEDDED_ELF ON CACHE BOOL "" FORCE)
+  set(IREE_ENABLE_THREADING OFF CACHE BOOL "" FORCE)
+elseif(RISCV_CPU MATCHES "linux")
   set(CMAKE_SYSTEM_NAME Linux)
+endif()
+
+if(RISCV_CPU MATCHES "riscv_64")
+  set(CMAKE_SYSTEM_PROCESSOR riscv64)
+elseif(RISCV_CPU MATCHES "riscv_32")
+  set(CMAKE_SYSTEM_PROCESSOR riscv32)
+endif()
+
+if(RISCV_CPU STREQUAL "linux-riscv_64")
   set(CMAKE_SYSTEM_LIBRARY_PATH "${RISCV_TOOLCHAIN_ROOT}/sysroot/usr/lib")
   # Specify ISP spec for march=rv64gc. This is to resolve the mismatch between
   # llvm and binutil ISA version.
@@ -55,9 +80,14 @@
     "--iree-llvmcpu-target-cpu-features=+m,+a,+f,+d,+c,+zvl512b,+v"
     "--riscv-v-fixed-length-vector-lmul-max=8"
     CACHE INTERNAL "Default llvm codegen flags for testing purposes")
+elseif(RISCV_CPU STREQUAL "generic-riscv_64")
+  # Specify ISP spec for march=rv64gc. This is to resolve the mismatch between
+  # llvm and binutil ISA version.
+  set(RISCV_COMPILER_FLAGS "${RISCV_COMPILER_FLAGS} \
+      -march=rv64i2p0ma2p0f2p0d2p0c2p0 -mabi=lp64d -DIREE_PLATFORM_GENERIC=1 -DIREE_SYNCHRONIZATION_DISABLE_UNSAFE=1 \
+      -DIREE_FILE_IO_ENABLE=0 -DIREE_TIME_NOW_FN=\"\{ return 0; \}\" -DIREE_DEVICE_SIZE_T=uint64_t -DPRIdsz=PRIu64")
+  set(RISCV_LINKER_FLAGS "${RISCV_LINKER_FLAGS} -lm")
 elseif(RISCV_CPU STREQUAL "linux-riscv_32")
-  set(CMAKE_SYSTEM_PROCESSOR riscv32)
-  set(CMAKE_SYSTEM_NAME Linux)
   list(APPEND CMAKE_SYSTEM_LIBRARY_PATH
     "${RISCV_TOOLCHAIN_ROOT}/sysroot/usr/lib32"
     "${RISCV_TOOLCHAIN_ROOT}/sysroot/usr/lib32/ilp32d"
@@ -74,23 +104,7 @@
     "--riscv-v-fixed-length-vector-lmul-max=8"
     CACHE INTERNAL "Default llvm codegen flags for testing purposes")
 elseif(RISCV_CPU STREQUAL "generic-riscv_32")
-  set(CMAKE_SYSTEM_PROCESSOR riscv32)
-  set(CMAKE_SYSTEM_NAME Generic)
-  set(CMAKE_CROSSCOMPILING ON CACHE BOOL "")
-  set(CMAKE_C_STANDARD 11)
-  set(CMAKE_C_EXTENSIONS OFF)     # Force the usage of _ISOC11_SOURCE
-  set(IREE_BUILD_BINDINGS_TFLITE OFF CACHE BOOL "" FORCE)
-  set(IREE_BUILD_BINDINGS_TFLITE_JAVA OFF CACHE BOOL "" FORCE)
-  set(IREE_HAL_DRIVER_DEFAULTS OFF CACHE BOOL "" FORCE)
-  set(IREE_HAL_DRIVER_LOCAL_SYNC ON CACHE BOOL "" FORCE)
-  set(IREE_HAL_EXECUTABLE_LOADER_DEFAULTS OFF CACHE BOOL "" FORCE)
-  set(IREE_HAL_EXECUTABLE_LOADER_EMBEDDED_ELF ON CACHE BOOL "" FORCE)
-  set(IREE_HAL_EXECUTABLE_LOADER_VMVX_MODULE ON CACHE BOOL "" FORCE)
-  set(IREE_HAL_EXECUTABLE_PLUGIN_DEFAULTS OFF CACHE BOOL "" FORCE)
-  set(IREE_HAL_EXECUTABLE_PLUGIN_EMBEDDED_ELF ON CACHE BOOL "" FORCE)
-  set(CMAKE_SYSTEM_LIBRARY_PATH "${RISCV_TOOLCHAIN_ROOT}/riscv32-unknown-elf/lib")
-  set(IREE_ENABLE_THREADING OFF CACHE BOOL "" FORCE)
-  # Specify ISP spec for march=rv64gc. This is to resolve the mismatch between
+  # Specify ISP spec for march=rv32gc. This is to resolve the mismatch between
   # llvm and binutil ISA version.
   set(RISCV_COMPILER_FLAGS "${RISCV_COMPILER_FLAGS} \
       -march=rv32i2p0mf2p0 -mabi=ilp32 -DIREE_PLATFORM_GENERIC=1 -DIREE_SYNCHRONIZATION_DISABLE_UNSAFE=1 \