Sign in
opensecura
/
3p
/
lowrisc
/
opentitan
/
2b44ce6546a268f39bea9145b9a6bd0b1fd30319
/
.
/
sw
/
device
/
tock
/
chips
/
earlgrey
/
README.md
blob: 8d1138b4431a7c8e7ca99be1006923201bc8da2c [
file
] [
log
] [
blame
] [
view
]
# Earlgrey chip
OpenTitan
chip implementation
,
which corresponds to the hardware
as
instantiated
from
`hw/top_earlgrey`
RTL
.
It
includes
Ibex
chip
and
a specific peripheral configuration
,
interrupt list
and
memory layout
.
