blob: 5d7b1e3f9823f4d6d2f4d5669a0ba126533971b6 [file] [log] [blame] [view]
---
title: "List of Top-Level Designs"
---
This page lists all top-level designs and their targets that are contained within this repository.
Click on the design name to get more information about the design.
| Design | Internal Name | Simulation Targets | FPGA Targets | ASIC Targets | Description |
|--------|---------------|--------------------|--------------|--------------|-------------|
| [Earl Grey]({{< relref "hw/top_earlgrey/doc" >}}) | `top_earlgrey` | Verilator | ChipWhisperer CW310\* | *None yet.* | 0.1 release |
`*` There exists a modified version of the Earl Grey top-level design that can be implemented on the Nexys Video FPGA board usable with a free EDA tool license.