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opensecura
/
3p
/
lowrisc
/
opentitan
/
dcee03a96bea3246a99de80c03055312015843ca
/
util
/
topgen
/
lib.py
0e8660b
[top] Slightly tidy up some auto-generated signals
by Rupert Swarbrick
· 4 years ago
74c4ff2
[topgen] Rework pinmux datastructure and templatize tops
by Michael Schaffner
· 4 years ago
200d8b4
[topgen] Allow multiple device interfaces to connect to the crossbar
by Rupert Swarbrick
· 4 years, 1 month ago
9443221
[top / util] updates to ast generation
by Timothy Chen
· 4 years, 1 month ago
90b8242
[util] Add support for partial one-to-N connections.
by Timothy Chen
· 4 years, 2 months ago
53b0d4d
Run lintpy for reggen/tlgen/topgen
by Weicai Yang
· 4 years, 4 months ago
7f8cc8e
[top] Add power attribute to the design
by Timothy Chen
· 4 years, 5 months ago
1b018de
[xbar/dv] Update chip-level xbar to drive from each IP ports
by Weicai Yang
· 4 years, 8 months ago
529134b
[topgen] flake8 lint fix
by Eunchan Kim
· 5 years ago
0550d69
[topgen] - Generate top clock groups variable
by Timothy Chen
· 5 years ago
0938b33
[topgen] Add Module Name When Prefixing Signals
by Sam Elliott
· 5 years ago
40098a9
[topgen] Refactor Inter-module to support all
by Eunchan Kim
· 5 years ago
e8cb3bd
[topgen] - Generate reset paths for top level connection
by Timothy Chen
· 5 years ago
6599ba9
[topgen] Array of inter-module signal
by Eunchan Kim
· 5 years ago
6a4b49e
[topgen] Use OrderedDict for top, xbar objects
by Eunchan Kim
· 5 years ago
e4a8507
[topgen] Inter-module connection Step 1
by Eunchan Kim
· 5 years ago
14a3fee
[doc] Use consistent spelling/capitalization of names
by Philipp Wagner
· 5 years ago
436d224
[top/earlgrey] Adding PINMUX to the top
by Eunchan Kim
· 5 years ago
4c5fbec
[hw/ip] Update references to data
by Tobias Wölfel
· 5 years ago
632c6f7
[topgen] Add PINMUX & PADS to hjson
by Eunchan Kim
· 6 years ago