1. 16392ef [dv] Add sv_flist_gen_flags HJson var for FuseSoc by Srikrishna Iyer · 3 years, 7 months ago
  2. f9564de [top] update constraints for passthrough by Timothy Chen · 4 years ago
  3. eb47586 [syn] Add additional instructions by Timothy Chen · 4 years ago
  4. 4dfb18b [syn] Correct power report regexp by Michael Schaffner · 4 years ago
  5. 9e29aed [syn] Correct report parser script by Michael Schaffner · 4 years ago
  6. 9dc0070 [syn] Add some more example commands to the readme by Michael Schaffner · 4 years ago
  7. 4c583de [top] Connect RomCtrlSkipCheck by Timothy Chen · 4 years ago
  8. d5c17cc [sdc] Correct the clock group constraint by Michael Schaffner · 4 years ago
  9. e489c4a [tools] simple instructions for interactive synth by Timothy Chen · 4 years ago
  10. 93fe50c [top/chip] Rename chip-level tops by Michael Schaffner · 4 years ago
  11. 5b6f9d6 [dvsim] Added common build fail patterns by Srikrishna Iyer · 4 years ago
  12. 00a064a [dvsim] Use bash when running make underneath by Srikrishna Iyer · 4 years, 1 month ago
  13. b403834 [dvsim/syn] Update parsing script and area reporting by Michael Schaffner · 4 years, 1 month ago
  14. 736bbce [syn] Add chip level SDC and synthesis config by Michael Schaffner · 4 years, 2 months ago
  15. b5b8eba [padring/top] Carry over pinout from bronze and align sim and FPGA tops by Michael Schaffner · 4 years, 2 months ago
  16. c4f3c7f [syn] Minor updates by Srikrishna Iyer · 4 years, 2 months ago
  17. cce6094 [cleanup] Mass replace tabs with spaces by Srikrishna Iyer · 4 years, 3 months ago
  18. 498deab [vendor/ibex] Remove duplicate check tool requirements files by Michael Schaffner · 4 years, 3 months ago
  19. 981c36b [dvsim] Logic to copy repo to scratch area by Srikrishna Iyer · 4 years, 3 months ago
  20. a23dfec [util] Rejig how we load hjson configurations for dvsim.py by Rupert Swarbrick · 4 years, 7 months ago
  21. ce93b99 [asic] Enable Masking for KMAC by Eunchan Kim · 4 years, 5 months ago
  22. b3e4dcd [syn/otbn/aes] Add block-level OTBN synthesis and fix AES synthesis by Michael Schaffner · 4 years, 5 months ago
  23. a8fb05e [dvsim] Fix HJson bugs by Srikrishna Iyer · 4 years, 5 months ago
  24. a0f1ab9 [dv/common] Move testplan from tools directory to data by Weicai Yang · 4 years, 6 months ago
  25. 6bf8540 [syn] Minor fix to test synthesis script by Michael Schaffner · 4 years, 6 months ago
  26. eb333ec [syn] Carry over synthesis flow updates from bronze by Michael Schaffner · 4 years, 8 months ago
  27. ea90aac [dvsim] Change cores-root to avoid conflicts with autogen'd core files by Michael Schaffner · 4 years, 8 months ago
  28. be47dd7 [flows] Various updates to tools and documents to suppose top/ip select by Timothy Chen · 4 years, 8 months ago
  29. 0697e5f [syn] Minor updates to align flow with foundry setup scripts by Michael Schaffner · 4 years, 8 months ago
  30. 75105e0 [syn] Fix an error in the DC synthesis setup by Michael Schaffner · 4 years, 8 months ago
  31. 5e6812b [dvsim/syn] Update flow to copy over new lib-setup.tcl file by Michael Schaffner · 4 years, 8 months ago
  32. 9b2c3d2 [syn] Add CONSTRAINT environment in synthesis script by Eunchan Kim · 4 years, 8 months ago
  33. a7bba81 [syn] Add gitignore file to dc folder by Michael Schaffner · 4 years, 8 months ago
  34. fe79c4b switch to host, primary, or over-arching as appropriate by Scott Johnson · 4 years, 9 months ago
  35. 8194488 [syn] Fix behavior of parsing script in a few error cases by Michael Schaffner · 4 years, 9 months ago
  36. 37324a7 [tool/script] delete clean section in make files by Cindy Chen · 4 years, 9 months ago
  37. 373f6d1 [dvsim/syn/lint] Add options to selectively sanitize reports by Michael Schaffner · 4 years, 9 months ago
  38. 25f451a [syn] Minor refactorings in parse-syn-report.py by Rupert Swarbrick · 4 years, 9 months ago
  39. 9827e00 [syn] Update AT plot script by Michael Schaffner · 4 years, 9 months ago
  40. 5f4f602 [syn] Minor updates to synthesis script by Michael Schaffner · 4 years, 9 months ago
  41. 8fc927c [syn] Print detailed messages to .md if publication is disabled by Michael Schaffner · 4 years, 9 months ago
  42. 5c581d8 [syn] Minor updates to synthesis scripts by Michael Schaffner · 4 years, 10 months ago
  43. e9c94b9 [syn] Revise constraints by Eunchan Kim · 4 years, 11 months ago
  44. eeef3df [lint] Add Verible configuration file and update parsing script by Michael Schaffner · 5 years ago
  45. 4204a8d [dvsim] Initial verible lint integration by Michael Schaffner · 5 years ago
  46. f342ba2 [syn] Add testsynthesis and sweep scripts for experiments by Michael Schaffner · 5 years ago
  47. 6b714a0 [syn/lint] Small scripting fixes in synthesis/lint flows by Michael Schaffner · 5 years ago
  48. d95b2a1 [syn] Split SDC file into per IP file and add AES example by Michael Schaffner · 5 years ago
  49. 3d16099 [dvsim] Synthesis target integration by Michael Schaffner · 5 years ago
  50. 17df5a2 [syn] This adds a simple testsynthesis flow for DC by Michael Schaffner · 5 years ago