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opensecura / 3p / lowrisc / opentitan / 9d75b80410f2801600353336a06354719171b6e7 / hw / top_earlgrey / util / vivado_setup_hooks.tcl
  1. eb1eba3 [fpga] Add Vivado pre-synthesis hook, also setup hooks for CW305 board by Pirmin Vogel · 4 years, 5 months ago
  2. 1b1de66 [top_earlgrey] BRAM implementation FPGA check for ROM memory by Ram Penugonda · 5 years ago
  3. f504021 [top_earlgrey] Check timing before bitstream generation by Philipp Wagner · 5 years ago