- a63edef [reggen] Replace prim_pulse_sync with prim_sync_reqack by Timothy Chen · 3 years, 6 months ago
- 2444ac0 [util] Tidy up how we call finst_gen in reg_top.sv.tpl by Rupert Swarbrick · 3 years, 7 months ago
- af9b61c [reggen] Always connect read enable signal to shadow regs by Michael Schaffner · 3 years, 7 months ago
- 5d83537 [regfile] Refactor cdc handling to the reg level by Timothy Chen · 3 years, 7 months ago
- e83d30f [rstmgr, top] Add support for shadow resets by Timothy Chen · 3 years, 8 months ago
- a49ceb6 [util, reggen] Support standardized cdc handling for regfile by Timothy Chen · 3 years, 9 months ago
- 9ce30ab [prim_subreg] Make software access type an enum by Philipp Wagner · 3 years, 8 months ago
- 1a5d53a [alert_handler] Make critical alert handler CSRs shadowed regs by Michael Schaffner · 3 years, 10 months ago
- 7cb7f20 [reggen] Generate a single we/re signal per register in reg_top by Rupert Swarbrick · 3 years, 10 months ago
- 57054be [reggen] Simplify reg_top ports if there's exactly one window by Rupert Swarbrick · 3 years, 10 months ago
- da5ed15 [reggen] Optionally expose register interface in reg2hw signal by Rupert Swarbrick · 3 years, 10 months ago
- 49e177c [reggen] Remove hwqe and hwre from Field objects in Python code by Rupert Swarbrick · 3 years, 10 months ago
- c5a68c9 [reggen] Slightly refactor code for hwext register fields by Rupert Swarbrick · 3 years, 10 months ago
- 359c126 [reggen] Make spacing uniform and simplify comments in reg_top by Rupert Swarbrick · 3 years, 10 months ago
- ce8e393 [regtool] Reformulate wr_err calculation to avoid long lines by Rupert Swarbrick · 4 years ago
- 62dabf7 [reggen, util] Add support for data integrity passthrough by Timothy Chen · 4 years ago
- 1032b47 [reggen] Clean up some spaces above write/read-enable registers by Rupert Swarbrick · 4 years, 1 month ago
- 200d8b4 [topgen] Allow multiple device interfaces to connect to the crossbar by Rupert Swarbrick · 4 years, 1 month ago
- 915df69 [tlul] Enable tlul integrity check across the design by Timothy Chen · 4 years, 1 month ago
- 269bb3d [reggen] Define a class wrapping the top-level IP block by Rupert Swarbrick · 4 years, 1 month ago
- aa6c1ed [top] peripheral / host transmission integrity by Timothy Chen · 4 years, 1 month ago
- a6f5829 [tlul] block writes and reads on errors in adapter_reg by Timothy Chen · 4 years, 1 month ago
- 1db6fcd [reggen] Define a class to represent the registers in a block by Rupert Swarbrick · 4 years, 2 months ago
- 27b0a64 [dv] Hard code various dv connections until full hook-up by Timothy Chen · 4 years, 1 month ago
- d12569f [tlul] Add payload checker and generator on device side only. by Timothy Chen · 4 years, 2 months ago
- ac6af87 [top] Various minor lint fixes in the system by Timothy Chen · 4 years, 1 month ago
- bc2bc58 [reggen] Define a Window type to represent (memory) windows by Rupert Swarbrick · 4 years, 2 months ago
- 4d64536 [reggen] Delete duplicate Register/MultiRegister types in data.py by Rupert Swarbrick · 4 years, 2 months ago
- ede9480 [reggen] Delete duplicate Field type in data.py by Rupert Swarbrick · 4 years, 2 months ago
- 6a45bd4 [reggen] Do not declare non-local parameters in *reg_top.sv by Pirmin Vogel · 4 years, 7 months ago
- 204d98d [vsg] fix _i/_o for several modules by Scott Johnson · 4 years, 9 months ago
- ab9d1ca [reggen] Integrate shadow register primitive by Pirmin Vogel · 4 years, 10 months ago
- 46ede4b [hw] Add default clk/rst for prim_assert macros by Greg Chadwick · 5 years ago
- cf42308 [hw] Switch to explicit prim_assert.sv include by Greg Chadwick · 5 years ago
- 1b5fa9f [verible/style] This corrects several style linter warnings/errors by Michael Schaffner · 5 years ago
- 32dd11b [reggen] Remove FIFO depth when window is used by Eunchan Kim · 5 years ago
- ee9e8db [dv/fpv] Clean up FPV script and add EndpointType to tlul_assert.sv by Michael Schaffner · 5 years ago
- 18d6072 [templates] Rename all template files to conform to <ext>.tpl by Michael Schaffner · 5 years ago[Renamed from util/reggen/reg_top.tpl.sv]
- 9a92bea [reggen] Fix template error in degenerate case (empty hw2reg/reg2hw) by Michael Schaffner · 5 years ago
- a2c51d9 [reggen] Add support for non-homogenous multiregs by Michael Schaffner · 6 years ago
- 9a94b6c [reggen] Refactor reggen, first step towards nested multiregs by Michael Schaffner · 6 years ago
- b993190 [reggen] Refactor reggen, add "local" to param by Eunchan Kim · 6 years ago
- 3b36e06 [reggen] Revise devmode behavior by Eunchan Kim · 6 years ago
- 244a1d5 [reggen] Convert addrmiss to comb logic by Eunchan Kim · 6 years ago
- de88e3a [reggen] Add devmode_i to register module by Eunchan Kim · 6 years ago
- 51461cd [util/reggen] Addressed subword write. by Eunchan Kim · 6 years ago
- debaf5e [lint] Remove unused localparam by Eunchan Kim · 6 years ago
- 819a466 [util/reggen] Rework TL-UL to Register interaface by Eunchan Kim · 6 years ago
- 802543a Start of public OpenTitan development history by lowRISC Contributors · 6 years ago