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opensecura / 3p / lowrisc / opentitan / 137bebcbd665aa4da98ace3816bd653060ee583f / hw / ip / clkmgr / dv / clkmgr_sim_cfg.hjson
  1. 137bebc [dv/clkmgr] Add test for extclk feature by Guillermo Maturana · 3 years, 10 months ago
  2. af435d2 [dv/clkmgr] Adds more clock gating tests. by Guillermo Maturana · 4 years ago
  3. 0f8a5af [dv/clkmgr] Makes tb.sv functional. by Guillermo Maturana · 4 years ago
  4. d2c7fe6 [dv/clkmgr] Creates dv artifacts with uvmdvgen.py. by Guillermo Maturana · 4 years ago