[chip, dv] minor random fixups
- Updated usbdev pwrmgr test name in the testplan and test
- Reduced UART seeds to 5
Signed-off-by: Srikrishna Iyer <sriyer@google.com>
diff --git a/hw/top_earlgrey/data/chip_testplan.hjson b/hw/top_earlgrey/data/chip_testplan.hjson
index 576b612..b5e5564 100644
--- a/hw/top_earlgrey/data/chip_testplan.hjson
+++ b/hw/top_earlgrey/data/chip_testplan.hjson
@@ -775,7 +775,7 @@
'''
milestone: V2
tests: ["chip_dif_pwrmgr_smoketest",
- "chip_sw_pwrmgr_usbdev_smoketest"]
+ "chip_sw_pwrmgr_usbdev_wakeup"]
}
{
name: chip_pwrmgr_deep_sleep_all_reset_reqs
@@ -2373,16 +2373,6 @@
tests: []
}
{
- name: chip_prod_os
- desc: '''Run the OpenTitan TockOS that will be deployed in production.
-
- Run the TockOS image in DV. The advantage of doing so is running Tock with the full
- suite of design assertions and other checks in place in the DV environment.
- '''
- milestone: V2
- tests: ["chip_sw_opentitan_tock"]
- }
- {
name: chip_lc_walkthrough
desc: '''Walk through the life cycle stages reseting the chip each time.
diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index d67bb1a..199975c 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -165,7 +165,7 @@
uvm_test_seq: chip_sw_uart_tx_rx_vseq
sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
en_run_modes: ["sw_test_mode"]
- reseed: 10
+ reseed: 5
}
{
name: chip_sw_uart_tx_rx_idx1
@@ -173,7 +173,7 @@
sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
en_run_modes: ["sw_test_mode"]
run_opts: ["+uart_idx=1"]
- reseed: 10
+ reseed: 5
}
{
name: chip_sw_uart_tx_rx_idx2
@@ -181,7 +181,7 @@
sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
en_run_modes: ["sw_test_mode"]
run_opts: ["+uart_idx=2"]
- reseed: 10
+ reseed: 5
}
{
name: chip_sw_uart_tx_rx_idx3
@@ -189,7 +189,7 @@
sw_images: ["sw/device/tests/uart_tx_rx_test:1"]
en_run_modes: ["sw_test_mode"]
run_opts: ["+uart_idx=3"]
- reseed: 10
+ reseed: 5
}
{
name: chip_sw_uart_tx_rx_bootstrap
@@ -229,7 +229,7 @@
en_run_modes: ["sw_test_mode"]
}
{
- name: chip_sw_pwrmgr_usbdev_smoketest
+ name: chip_sw_pwrmgr_usbdev_wakeup
uvm_test_seq: chip_sw_base_vseq
sw_images: ["sw/device/tests/pwrmgr_usbdev_smoketest:1"]
en_run_modes: ["sw_test_mode"]
