[sw] Move Makefiles under sw/device folder Move device makefiles and sw/docs under sw/device folder. Makefile scaffolding is specific to device code, and thus should go in the new location. $(SW_ROOT_DIR) was left pointing to the sw/ root directory since there is vendor code shared between sw/device and sw/host. Update documents to call make as `make -C sw/device`. Update CI and FPGA splicing scripts to support new -C path. This commit is part of lowrisc/opentitan#27.
diff --git a/ci/run_sw_build.sh b/ci/run_sw_build.sh index e94a36f..49792a7 100755 --- a/ci/run_sw_build.sh +++ b/ci/run_sw_build.sh
@@ -38,7 +38,7 @@ PASS_TARGETS=() for target in "${BUILD_TARGETS[@]}"; do echo "Building target ${target}" - if make -C sw "SW_DIR=device/${target}" "SW_BUILD_DIR=build/${target}"; then + if make -C sw/device "SW_DIR=${target}" "SW_BUILD_DIR=../build/${target}"; then PASS_TARGETS=("${PASS_TARGETS[@]}" "${target}") else FAIL_TARGETS=("${FAIL_TARGETS[@]}" "${target}")
diff --git a/doc/ug/getting_started_verilator.md b/doc/ug/getting_started_verilator.md index 1831e65..c5bde52 100644 --- a/doc/ug/getting_started_verilator.md +++ b/doc/ug/getting_started_verilator.md
@@ -30,8 +30,8 @@ ```console $ cd $REPO_TOP -$ make -C sw SIM=1 SW_DIR=boot_rom SW_BUILD_DIR=${ROM_BUILD_DIR} clean all -$ make -C sw SIM=1 SW_DIR=examples/hello_world SW_BUILD_DIR=${SW_BUILD_DIR} clean all +$ make -C sw/device SIM=1 SW_DIR=boot_rom SW_BUILD_DIR=${ROM_BUILD_DIR} clean all +$ make -C sw/device SIM=1 SW_DIR=examples/hello_world SW_BUILD_DIR=${SW_BUILD_DIR} clean all ``` Now the simulation can be run.
diff --git a/hw/dv/tools/rules.mk b/hw/dv/tools/rules.mk index b6e6454..19c1899 100644 --- a/hw/dv/tools/rules.mk +++ b/hw/dv/tools/rules.mk
@@ -48,11 +48,11 @@ ifneq (${SW_NAME},) rm -rf ${SW_BUILD_DIR} mkdir -p ${SW_BUILD_DIR} - $(MAKE) -C $(SW_ROOT_DIR) \ - SW_DIR=device/boot_rom \ + $(MAKE) -C $(SW_ROOT_DIR)/device \ + SW_DIR=boot_rom \ SW_BUILD_DIR=$(SW_BUILD_DIR)/rom \ MAKEFLAGS="$(SW_OPTS)" - $(MAKE) -C $(SW_ROOT_DIR) \ + $(MAKE) -C $(SW_ROOT_DIR)/device \ SW_DIR=$(SW_DIR) \ SW_NAME=$(SW_NAME) \ SW_BUILD_DIR=$(SW_BUILD_DIR)/sw \
diff --git a/hw/top_earlgrey/dv/Makefile b/hw/top_earlgrey/dv/Makefile index 09f49fd..fb166e8 100644 --- a/hw/top_earlgrey/dv/Makefile +++ b/hw/top_earlgrey/dv/Makefile
@@ -27,30 +27,30 @@ UVM_TEST_SEQ ?= chip_base_vseq ifeq (${TEST_NAME},chip_sanity) - SW_DIR = device/examples/hello_world + SW_DIR = examples/hello_world SW_NAME = hello_world endif ifeq (${TEST_NAME},chip_flash_test) - SW_DIR = device/tests/flash_ctrl + SW_DIR = tests/flash_ctrl SW_NAME = flash_test RUN_OPTS += +cpu_test_timeout_ns=15000000 endif ifeq (${TEST_NAME},chip_sha256_test) - SW_DIR = device/tests/hmac + SW_DIR = tests/hmac SW_NAME = sha256_test RUN_OPTS += +cpu_test_timeout_ns=4000000 endif ifeq (${TEST_NAME},chip_rv_timer_test) - SW_DIR = device/tests/rv_timer + SW_DIR = tests/rv_timer SW_NAME = rv_timer_test RUN_OPTS += +cpu_test_timeout_ns=4000000 endif ifeq (${TEST_NAME},coremark) - SW_DIR = device/benchmarks/coremark + SW_DIR = benchmarks/coremark SW_NAME = coremark RUN_OPTS += +cpu_test_timeout_ns=20000000 SW_OPTS += ITERATIONS=1
diff --git a/sw/Makefile b/sw/device/Makefile similarity index 94% rename from sw/Makefile rename to sw/device/Makefile index 1c55359..1e3f47e 100644 --- a/sw/Makefile +++ b/sw/device/Makefile
@@ -23,14 +23,14 @@ # Generate a baremetal application for the microcontroller -SW_ROOT_DIR := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST)))) -SW_DIR ?= device/examples/hello_world +SW_ROOT_DIR := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))/.. +SW_DIR ?= examples/hello_world # sources STANDALONE_SW ?= 0 include ${SW_DIR}/srcs.mk -include device/exts/common/srcs.mk -include device/lib/srcs.mk +include exts/common/srcs.mk +include lib/srcs.mk # common options and rules include opts.mk
diff --git a/sw/doc/sw_build_flow.md b/sw/device/doc/sw_build_flow.md similarity index 88% rename from sw/doc/sw_build_flow.md rename to sw/device/doc/sw_build_flow.md index 5ff186b..eb2e206 100644 --- a/sw/doc/sw_build_flow.md +++ b/sw/device/doc/sw_build_flow.md
@@ -50,18 +50,18 @@ the files listed below for more details. ## Organization -The SW build Makefiles are organized as follows: +The SW device build Makefiles are organized as follows: -- **`sw/Makefile`**: The top level SW build Makefile (`sw/Makefile`). All of the +- **`sw/device/Makefile`**: The top level SW build Makefile (`sw/device/Makefile`). All of the sub-make files are included directly or indirectly into this. This is the starting point for compiling any target. -- **`sw/opts.mk`**: All commonly used Make variables in one place. This sub-make +- **`sw/device/opts.mk`**: All commonly used Make variables in one place. This sub-make file is also used to check if certain switches are enabled and further modify / customize the flow for target being built. An example of this is using the `TARGET` variable to change how SW is built for DV vs FPGA / Verilator / production SW. -- **`sw/rules.mk`**: All rules for generating all the outputs in one place. +- **`sw/device/rules.mk`**: All rules for generating all the outputs in one place. These three form the *base-make files* for the SW build. Any directory containing sources for building the SW needs to have an associated `srcs.mk` sub-make file @@ -91,14 +91,14 @@ ## How to build SW The examples indicated below assume that the present working directory is -`SW_ROOT_DIR`. As indicated in the previous sections, `SW_DIR` and `SW_NAME` are +`$(SW_ROOT_DIR)/device`. As indicated in the previous sections, `SW_DIR` and `SW_NAME` are mandatory variables that need to be set correctly on the command line. `SW_NAME` is optional if `SW_DIR` has only one SW target and `SW_NAME` is set in `$(SW_DIR)/srcs.mk` file. `SW_BUILD_DIR` is optional. Build boot_rom: ```console -$ make SW_DIR=device/boot_rom SW_NAME=boot_rom +$ make SW_DIR=boot_rom SW_NAME=boot_rom ``` This will build the boot_rom image in the device/boot_rom directly itself. SW_NAME in @@ -107,15 +107,15 @@ - Build the boot_rom in a separate build directory: ```console -$ make SW_DIR=device/boot_rom SW_BUILD_DIR=path/to/scratch +$ make SW_DIR=boot_rom SW_BUILD_DIR=path/to/scratch ``` - Build hello_world test: ```console -$ make SW_DIR=device/examples/hello_world SW_NAME=hello_world SW_BUILD_DIR=path/to/scratch +$ make SW_DIR=examples/hello_world SW_NAME=hello_world SW_BUILD_DIR=path/to/scratch ``` - Build sha256 test: ```console -$ make SW_DIR=device/tests/hmac SW_NAME=sha256_test +$ make SW_DIR=tests/hmac SW_NAME=sha256_test ```
diff --git a/sw/opts.mk b/sw/device/opts.mk similarity index 95% rename from sw/opts.mk rename to sw/device/opts.mk index d0d21d8..0b33b0c 100644 --- a/sw/opts.mk +++ b/sw/device/opts.mk
@@ -21,7 +21,7 @@ SW_OBJS += $(addprefix $(SW_BUILD_DIR)/, $(addsuffix .o, $(basename $(notdir $(SW_SRCS))))) SW_PPOS += $(SW_OBJS:.o=.ppo) SW_DEPS ?= lib -SW_BUILD_DIR ?= $(SW_ROOT_DIR)/$(SW_DIR) +SW_BUILD_DIR ?= $(SW_ROOT_DIR)/device/$(SW_DIR) LIB_NAME ?= ot LIB_DIR ?= $(SW_ROOT_DIR)/device/lib @@ -31,10 +31,10 @@ LIB_PPOS += $(LIB_OBJS:.o=.ppo) LIB_BUILD_DIR ?= $(SW_BUILD_DIR)/lib -GEN_HDRS_DIR ?= $(SW_ROOT_DIR)/generated +GEN_HDRS_DIR ?= $(SW_ROOT_DIR)/device/generated DEPS += $(SW_OBJS:%.o=%.d) $(LIB_OBJS:%.o=%.d) -INCS += -I.. -I$(LIB_BUILD_DIR) +INCS += -I../.. -I$(LIB_BUILD_DIR) LINK_OPTS += -T $(LINKER_SCRIPT) LINK_OPTS += $(SW_OBJS) -L$(LIB_BUILD_DIR) -l$(LIB_NAME)
diff --git a/sw/rules.mk b/sw/device/rules.mk similarity index 100% rename from sw/rules.mk rename to sw/device/rules.mk
diff --git a/sw/host/spiflash/README.md b/sw/host/spiflash/README.md index e85c361..e113e24 100644 --- a/sw/host/spiflash/README.md +++ b/sw/host/spiflash/README.md
@@ -33,13 +33,13 @@ Build `boot_rom`: ```console $ cd ${REPO_TOP} -$ make -C sw SW_DIR=boot_rom clean all +$ make -C sw/device SW_DIR=boot_rom clean all ``` Build `hello_world` program: ```console $ cd ${REPO_TOP} -$ make -C sw SW_DIR=examples/hello_world clean all +$ make -C sw/device SW_DIR=examples/hello_world clean all ``` ## Run the tool in Verilator
diff --git a/util/fpga/splice_nexysvideo.sh b/util/fpga/splice_nexysvideo.sh index 062223d..af895fe 100755 --- a/util/fpga/splice_nexysvideo.sh +++ b/util/fpga/splice_nexysvideo.sh
@@ -19,7 +19,7 @@ FPGA_BUILD_DIR=build/lowrisc_systems_top_earlgrey_nexysvideo_0.1/synth-vivado/ FPGA_BIT_NAME=lowrisc_systems_top_earlgrey_nexysvideo_0.1 -make -C sw "SW_BUILD_DIR=${BUILD_DIR}" SW_DIR=boot_rom distclean all +make -C sw/device "SW_BUILD_DIR=../${BUILD_DIR}" SW_DIR=boot_rom distclean all srec_cat ${TARGET_PREFIX}.bin -binary -offset 0x0 -o ${TARGET_PREFIX}.brammem \ -vmem -Output_Block_Size 4;